PEF 20954 HT V1.1 Infineon Technologies, PEF 20954 HT V1.1 Datasheet - Page 117

• Manufacturer Part Number: PEF 20954 HT V1.1
• Description: IC ECHO CANCELLER DGTL TQFP144
• Manufacturer: Infineon Technologies

Specifications of PEF 20954 HT V1.1

• Function: Smart Integrated Digital Echo Canceller (SIDEC)
• Interface: PCM, Serial, UCC
• Number Of Circuits: 1
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 350mA
• Power (watts): 900mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LFQFP
• Includes: Double Talk Detection
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: PEF20954HTV1.1; SP000007505

AFCMC[7,4:0] (Addr.: 7AH): AFI Filter Coefficients Monitoring Control,
Reset value = 00H
To successively read out all coefficients of a channel's filter, the processor writes the
channel number and a set MONON bit to this register. The coefficients and aux.
coefficients of the channel are delivered in ascending order via the registers AFCD1 thru
AFCD3. The SIDEC interrupt request "Monitored coefficient available" indicates
availability of the next coefficient. A running readout procedure stops immediately if the
processor writes the AFCMC register again.
MONON
CHSEL[4:0]
Data Sheet
MON
ON
-
values that are considered for "no-voice"-detection. It is configured in
the range from -42 dBm0 (VDAT[3:0] = "0001") to 0 dBm0
(VDAT[3:0] = "1111") in steps of 3 dBm0. With VDAT set to the
default value "0000", no lower limit on the amplitude is in effect for
"no-voice"-detection.
"0000": - infinity
"0010": -39 dBm
"0100": -33 dBm
"0110": -27 dBm
"1000": -21 dBm
"1010": -15 dBm
"1100": -9 dBm
"1110": -3 dBm
Monitoring on/off:
If MON_ON is cleared, coefficient readout is completely reset
immediately. If '1' is written to an already set MONON bit,
MONON is first cleared to reset the readout procedure and then set
to start readout for the new channel. If coefficient readout is not
stopped explicitely by the processor, readout ends after delivery of
the channel's last coefficient which resets the MONON bit.
Channel selection:
In 128 ms mode the ASIC does not respond to requests for data
channels it does not process (e.g. in master mode the chip responds
only to requests for channels 0 to 3, 8 to 11, 16 to 19 and 24 to 27.
-
SEL[4]
CH
117
"0001": -42 dBm
"0011": -36 dBm
"0101": -30 dBm
"0111": -24 dBm
"1001": -18 dBm
"1011": -12 dBm
"1101": -6 dBm
"1111": 0 dBm
SEL[3]
CH
SEL[2]
CH
Register Description
SEL[1]
CH
Rev. 2, 2004-07-28
PEB 20954
PEF 20954
SEL[0]
CH