SAM3S1B Atmel Corporation, SAM3S1B Datasheet - Page 854

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SAM3S1B

Manufacturer Part Number
SAM3S1B
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3S1B

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
36.6.2.3
Figure 36-6. 2-bit Gray Up/Down Counter
36.6.2.4
854
PWML0
PWML1
PWMH0
PWMH1
DOWNx
SAM3S
2-bit Gray Up/Down Counter for Stepper Motor
Dead-Time Generator
It is possible to configure a couple of channels to provide a 2-bit gray count waveform on 2 out-
puts. Dead-Time Generator and other downstream logic can be configured on these channels.
Up or down count mode can be configured on-the-fly by means of PWM_SMMR configuration
registers.
When GCEN0 is set to 1, channels 0 and 1 outputs are driven with gray counter.
The dead-time generator uses the comparator output OCx to provide the two complementary
outputs DTOHx and DTOLx, which allows the PWM macrocell to drive external power control
switches safely. When the dead-time generator is enabled by setting the bit DTE to 1 or 0 in the
“PWM Channel Mode Register”
overlapping times) are inserted between the edges of the two complementary outputs DTOHx
and DTOLx. Note that enabling or disabling the dead-time generator is allowed only if the chan-
nel is disabled.
The dead-time is adjustable by the
puts of the dead-time generator can be adjusted separately by DTH and DTL. The dead-time
values can be updated synchronously to the PWM period by using the
Time Update Register”
The dead-time is based on a specific counter which uses the same selected clock that feeds the
channel counter of the comparator. Depending on the edge and the configuration of the dead-
time, DTOHx and DTOLx are delayed until the counter has reached the value defined by DTH or
DTL. An inverted configuration bit (DTHI and DTLI bit in the PWM_CMRx register) is provided
for each output to invert the dead-time outputs. The following figure shows the waveform of the
dead-time generator.
(PWM_DTUPDx).
GCEN0 = 1
(PWM_CMRx), dead-times (also called dead-bands or non-
“PWM Channel Dead Time Register”
(PWM_DTx). Both out-
“PWM Channel Dead
6500C–ATARM–8-Feb-11

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