SAM3S1B Atmel Corporation, SAM3S1B Datasheet - Page 889
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SAM3S1B
Manufacturer Part Number
SAM3S1B
Description
Manufacturer
Atmel Corporation
Specifications of SAM3S1B
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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36.7.10
Name:
Address:
Access:
• UPDULOCK: Synchronous Channels Update Unlock
0 = No effect
1 = If the UPDM field is set to “0” in
triggers the update of the period value, the duty-cycle and the dead-time values of synchronous channels at the beginning
of the next PWM period. If the field UPDM is set to “1” or “2”, writing the UPDULOCK bit to “1” triggers only the update of
the period value and of the dead-time values of synchronous channels.
This bit is automatically reset when the update is done.
6500C–ATARM–8-Feb-11
31
23
15
–
–
–
7
–
PWM Sync Channels Update Control Register
30
22
14
PWM_SCUC
0x40020028
–
–
–
6
–
Read-write
“PWM Sync Channels Mode Register” on page
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
27
19
11
–
–
–
3
–
26
18
10
–
–
–
2
–
888, writing the UPDULOCK bit to “1”
25
17
–
–
9
–
1
–
SAM3S
UPDULOCK
24
16
–
–
8
–
0
889
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