TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 100

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TMP92xy22FG

Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy22FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
(2) The cautions at the time of the functional change of a
general-purpose port function. In this case, an output latch register and a function control
register are initialized by the reset action, and an object terminal is initialized by the port
output (“1” or “0”) by it.
A chip select signal output has the case of a combination terminal with a
* XX is a function register address.(When an output port is initialized by “0”)
setting up a function control register (PnFC register), the short pulse for several ns
may be outputted to the changing timing. Although it does not become especially a
problem when using the usual memory, it may become a problem when using a special
memory.
unnecessary pulse is outputted by access to the object CS area immediately after
setting it as a CSn function. Then, if internal area is accessed also immediately after
setting a port as CS function, an unnecessary pulse will not output.
Function control signal
Function control signal
Internal address bus
Internal address bus
Functional change
Although an object terminal is changed from a port to a chip select signal output by
The measure by software
The countermeasures in S/W for avoiding this phenomenon are explained.
Since CS signal decodes the address of the access area and is generated, an
1. Prohibition of use of an NMI function
2. The ban on interruption under functional change (DI command)
3. A dummy command is added in order to carry out continuous internal access.
4. (Access to a functional change register is corresponded by 16-bit command.
A23 to A0
A23 to A0
Pxx
Pxx
(LDW command))
Output port
XX
92CM22-98
A port is set as
n
n
n
Output port
XX+1
XX
CSn
CSn
.
A port is set as CSn .
Dummy access
CSn
Output pulse
.
n+2
n+2
CSn
t
AD3
n+2
n+2
TMP92CM22
2007-02-16

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