TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 161

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

BR1CR
(120BH)
BR1ADD
(120CH)
Note1:Availability of +(16-K)/16 division function
Note2:Set BR1CR <BR1ADDE> to 1 after setting K (K = 1 to 15) to BR1ADD<BR1K3:0> when +(16-K)/16 division function is
+ (16 − K)/16 divisions enable
BR1ADD
<BR1K3:0>
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
0
1
1111 (K = 15)
The baud rate generator can be set to “1” in UART mode only when the +(16-K)/16 division function is not used. Do not
0001 (K = 1)
used. Writes to unused bits in the BR1ADD register do not affect operation, and undefined data is read from these
unused bits.
Figure 3.9.12 Baud Rate Generater Control (for SIO1, BR1CR, and BR1ADD)
use in I/O interface mode.
Disabled
Enabled
0000
BR1CR
<BR1S3:0>
Always
write “0”.
N
2 to 15
1 , 16
7
7
−
0
Baud rate generator frequency divisor setting
+ (16 − K)/16
division
0: Disable
1: Enable
BR1ADDE
0000 (N = 16)
0001 (N = 1)
Disable
Disable
UART mode
6
6
0
BR1CR<BR1ADDE> = 1
or
○
×
Input clock selection for baud rate generator
00: φT0
01: φT2
10: φT8
11: φT32
00
01
10
11
BR1CK1
92CM22-159
5
5
0
N + (16 − K) / 16
Internal clock φT0
Internal clock φT2
Internal clock φT8
Internal clock φT32
1111 (N = 15)
0010 (N = 2)
Divided by
I/O mode
Disable
BR1CK0
×
×
4
4
0
R/W
BR1S3
BR1K3
3
3
0001 (N = 1) (UART only)
0
0
BR1CR<BR1ADDE> = 0
(Divided by N + (16 − K)/16).
1111 (N = 15)
0000 (N = 16)
Divided by N
Divided frequency setting
Set frequency divisor “K”
BR1S2
BR1K2
to
2
2
0
0
R/W
BR1S1
BR1K1
1
1
0
0
TMP92CM22
BR1S0
BR1K0
2007-02-16
0
0
0
0