TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 258

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

(2) Points to note
a)
b)
c)
d) Watchdog timer
e)
f)
g)
h) POP SR instruction
AM0 and AM1 pins
alter the level when the pin is active.
Reservation area of address area
Warm-up counter
an external oscillator. As a result a time equivalent to the warm-up time elapses between
input of the release request and output of the system clock.
watchdog timer is not to be used, disable it.
AD converter
reduce power consumption. When STOP mode is used, disable the resistor using the
program before the HALT instruction is executed.
CPU (micro DMA)
in the CPU (e.g., the transfer source address register (DMASn)).
Undefined SFR bit
read.
This pin is connected to the VCC (Power supply level) or VSS (Ground level) pins. Do not
TMP92CM22 don’t include reservation area.
The warm-up counter operates when STOP mode is released, even if the system is using
The watchdog timer starts operation immediately after a reset is released. When the
The string resistor between the VREFH and VREFL pins can be cut by a program so as to
Only the LDC cr, r and LDC r, cr instructions can be used to access the control registers
The value of an undefined bit in an SFR (Special function register) is undefined when
Please execute the POP SR instruction during DI condition.
92CM22-256
TMP92CM22
2007-02-16