TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 178

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TMP92xy22FG

Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy22FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
Read-
modify-write
instruction is
prohibited.
SBI0SR
(1243H)
Bit symbol
Read/Write
After reset
Function
Note: Writing in this register functions as SBI0CR2.
Master/
slave
status
selection
monitor
MST
7
0
Transmitter/
receiver
status
selection
monitor
Figure 3.10.5 Register for I
Serial Bus Interface Status Register
TRX
6
0
I
status
monitor
2
C bus
92CM22-176
BB
5
0
INTSBE0
interrupt
request
monitor
PIN
4
1
2
C Bus Mode
R
Arbitration
lost
detection
monitor
0: −
1: Detected
AL
3
0
Last received bit monitor
GENERAL CALL detection monitor
Slave address match detection monitor
Arbitration lost detection monitor
INTSBE0 interrupt request monitor
I
Transmitter/receiver status monitor
Master/slave status monitor
2
Slave address
match
detection
monitor
0: Undetected
1: Detected
C bus status monitor
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
AAS
2
0
Last received bit was 0.
Last received bit was 1.
Undetected
GENERAL CALL detected
Undetected
Slave address match or
GENERAL CALL detected
Arbitration lost
Interrupt requested
Interrupt released
Free
Busy
Receiver
Transmitter
Slave
Master
GENERAL
CALL
detection
monitor
0: Undetected
1: Detected
AD0
1
0
TMP92CM22
2007-02-16
Last
received bit
monitor
0: 0
1: 1
LRB
0
0

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