TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 204

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TMP92xy22FG

Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy22FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
ADREG0L
(12A0H)
ADREG1L
(12A2H)
ADREG0H
(12A1H)
ADREG1H
(12A3H)
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Channel x
conversion result
Stores lower 2 bits of AD
Stores lower 2 bits of AD
ADR01
ADR11
ADR09
ADR19
conversion result
conversion result
7
7
7
7
Undefined
Undefined
R
R
ADREGxH
Figure 3.11.4 Register for AD Converter
AD Conversion Result Register 0 High
AD Conversion Result Register 1 High
9
AD Conversion Result Register 0 Low
AD Conversion Result Register 1 Low
ADR00
ADR10
ADR08
ADR18
7
6
6
6
6
8
6
7
5
ADR07
ADR17
92CM22-202
6
4
Stores upper 8 bits of AD conversion result.
5
5
5
5
• Bits 5 to 1 are always read as 1.
• Bit0 is the AD conversion data storage flag <ADRxRF>. When the AD
Stores upper 8 bits AD conversion result.
3
5
conversion result is stored, the flag is set to 1. When either of the
registers (ADREGxH, ADREGxL) is read, the flag is cleared to 0.
2
4
ADR06
ADR16
1
4
4
4
4
3
Undefined
Undefined
0
2
R
R
ADR05
ADR15
1
7
3
3
3
3
0
6
5
ADR04
ADR14
4
2
2
2
2
3
2
ADREGxL
ADR03
ADR13
1
1
1
1
1
TMP92CM22
0
2007-02-16
1: Conversion
AD conversion
data storage
flag
AD conversion
data storage
flag
1: Conversion
ADR0RF
ADR1RF
result stored
result stored
ADR02
ADR12
0
R
0
R
0
0
0
0

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