TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 91

no-image

TMP92xy22FG

Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy22FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
Note: When set P82 as
(6) Connecting external memory
TMP92CM22.
is cleared to “0”, and output “L”. Output latch of P80 (
(
to “1”.
CS3
Figure 3.6.1 shows an example of how to connect external memory to the
This example connects ROM and SRAM in 16-bit width.
By resetting, TMP92CM22 function as output port. Output latch of P82 (
When set port 8 from port function to CS function, set need bit of P8FC register
TMP92CM22
) are set to “1”, and output “H”.
latch of P82 is “0” (P8<P82> = 0). (P8FC<P82F> = 1)
If set function register (P8FC<P82F> = 1) after set output latch of P82 to “1”
(P8<P82> = 1), maybe don’t read ROM data during changing from port
function to
Figure 3.6.1 Example of External Memory
D [15:0]
WRLU
WRLL
R/
CS0
CS2
A0
A1
A2
A3
RD
W
CS2
Not connetion
.
92CM22-89
CS2
after release reset, set function register remain output
16-bit SRAM
R/W
I/O [16:1]
A0
A1
A2
16-bit ROM
DQ [15:0]
A0
A1
A2
OE
LB
UB
CE
OE
CE
CS0
), P81 (
TMP92CM22
CS1
2007-02-16
) and P83
CS2
)

Related parts for TMP92xy22FG