TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 61

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

(001BH)
(0018H)
(001AH)
P6FC
P6CR
P6
Bit symbol
Read/Write
After reset
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Note1: Read-modify-write instruction is prohibited for registers P6CR and P6FC.
Note2: When these ports are used as general-purpose I/O port, each bit can be set individually for input or output.
However, each bit cannot be set individually for input or output even if 1bit or more bits are used as address
bus in same port. All of general-purpose I/O ports except for port that used as address bus are operated as
output port. Please be careful when using this setting.
P67C
P67F
P67
7
7
7
0
1
P66C
P66F
P66
6
6
6
0
1
Data from external port (Output latch register is cleared to “0”.)
Figure 3.5.8 Register for Port 6
Port 6 Function Register
Port 6 Control Register
P65C
P65F
P65
5
5
5
0
1
0: Port 1: Address bus (A16 to A23)
Port 6 Register
92CM22-59
0: Input 1: Output (Note2)
P64C
P64F
P64
4
4
4
0
1
R/W
W
W
P63C
P63F
P63
3
3
3
0
1
P62C
P62F
P62
2
2
2
0
1
P61C
P61F
P61
1
1
1
0
1
P60C
P60F
TMP92CM22
P60
0
0
0
0
1
2007-02-16