TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 243

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

TA01MOD
TA23MOD
TA01RUN
TA23RUN
TA1FFCR
TA3FFCR
Symbol
TA0REG
TA1REG
TA2REG
TA3REG
(6) 8-bit timer
8-bit timer
8-bit timer
8-bit timer
8-bit timer
register 0
register 1
register 2
register 3
TMRA01
TMRA01
TMRA23
TMRA23
TMRA1
TMRA3
Name Address
register
register
flip-flop
register
register
register
flip-flop
register
control
control
mode
mode
RUN
RUN
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
110AH
110BH
110CH
110DH
1100H
1102H
1103H
1104H
1105H
1108H
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
Double
buffer
Operation mode
Double
buffer
0: Disable
1: Enable
Operation mode
0: Disable
1: Enable
TA0RDE
TA2RDE
TA01M1
TA23M1
00: 8-bit timer mode
01: 16-bit timer mode
10: 8-bit PPG mode
11: 8-bit PWM mode
00: 8-bit timer mode
01: 16-bit timer mode
10: 8-bit PPG mode
11: 8-bit PWM mode
R/W
R/W
7
0
0
0
0
TA01M0
TA23M0
6
0
0
92CM22-241
00: Reserved
01: 2
10: 2
11: 2
PWM cycle
PWM cycle
00: Reserved
01: 2
10: 2
11: 2
PWM01
PWM21
5
0
0
6
7
8
6
7
8
PWM00
PWM20
4
0
0
Undefined
Undefined
Undefined
Undefined
R/W
R/W
W
W
W
W
−
−
−
−
00: TA2TRG
01: φT1
10: φT16
11: φT256
IDLE2
Source clock for TMRA1
IDLE2
Source clock for TMRA3
0: Stop
TA1CLK1 TA1CLK0 TA0CLK1 TA0CLK0
TA1FFC1 TA1FFC0
00: Invert TA1FF
01: Set TA1FF
10: Clear TA1FF
11: Don’t care
0: Stop
1: Operate
TA3CLK1 TA3CLK0 TA2CLK1 TA2CLK0
TA3FFC1 TA3FFC0
1: Operate 0: Stop and clear
00: TA0TRG
01: φT1
10: φT16
11: φT256
00: Invert TA3FF
01: Set TA3FF
10: Clear TA3FF
11: Don’t care
I2TA01
I2TA23
3
0
0
1
0
0
1
W
W
TA01PRUN
TMRA01
prescaler
TMRA23
prescaler
0: Stop and clear
1: Run (Count up)
TA23PRUN
1: Run (Count up)
2
0
0
1
0
0
1
R/W
R/W
00: Reserved
01: φT1
10: φT4
11: φT16
UP counter
(UC1)
Source clock for TMRA0
TA1FF
control for
inversion
0: Disable
1: Enable
UP counter
(UC3)
Source clock for TMRA2
TA3FF
control for
inversion
0: Disable
1: Enable
00: TA0IN
01: φT1
10: φT4
11: φT16
TA1RUN
TA1FFIE
TA3RUN
TA3FFIE
1
0
0
0
0
0
0
TMP92CM22
R/W
R/W
2007-02-16
pin
0: TMRA0
1: TMRA1
0: TMRA2
1: TMRA3
UP counter
(UC0)
TA1FF
inversion
select
UP counter
(UC2)
TA3FF
inversion
select
TA0RUN
TA1FFIS
TA2RUN
TA3FFIS
0
0
0
0
0
0
0