TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 57

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

(0012H)
(0013H)
(0010H)
P4CR
P4FC
P4
Bit symbol
Read/Write
After reset
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Note1: Read-modify-write instruction is prohibited for registers P4CR and P4FC.
Note2: When these ports are used as general-purpose I/O port, each bit can be set individually for input or output.
However, each bit cannot be set individually for input or output even if 1bit or more bits are used as address
bus in same port. All of general-purpose I/O ports except for port that used as address bus are operated as
output port. Please be careful when using this setting.
P47C
P47F
P47
7
7
7
0
1
P46C
P46F
P46
6
6
6
0
1
Data from external port (Output latch register is cleared to “0”.)
Figure 3.5.4 Register for Port 4
Port 4 Function Register
Port 4 Control Register
P45C
P45F
P45
5
5
5
0
1
Port 4 Register
0: Port 1: Address bus (A0 to A7)
92CM22-55
0: Input 1: Output (Note2)
P44C
P44F
P44
4
4
4
0
1
R/W
W
W
P43C
P43F
P43
3
3
3
0
1
P42C
P42F
P42
2
2
2
0
1
P41C
P41F
P41
1
1
1
0
1
P40C
P40F
TMP92CM22
P40
0
0
0
0
1
2007-02-16