TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 190

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

(4) Stop condition generation
writing “111” to SBI0CR2<MST, TRX, PIN> and “0” to SBI0CR2<BB>. Do not modify
the contents of SBI0CR2<MST, TRX, PIN, BB> until a stop condition has been
generated on the bus. When the bus’s SCL line has been pulled low by another device,
the TMP92CM22 generates a stop condition when the other device has released the
SCL line and SDA pin rising.
When SBI0SR<BB> = 1, the sequence for generating a stop condition is started by
Internal SCL
SCL pin
SDA pin
<PIN>
<BB> (Read)
“1” → MST
“1” → TRX
“0” → BB
“1” → PIN
Figure 3.10.17 Stop Condition Generation (Single master)
Figure 3.10.18 Stop Condition Generation (Multi master)
“1” → <MST>
“1” → <TRX>
“0” → <BB>
“1” → <PIN>
SCL pin
SDA pin
<PIN>
SBI0SR<BB>
(Reading)
92CM22-188
The case of pulled low
by another device
Stop condition
Stop condition
TMP92CM22
2007-02-16