R1610C RDC Semiconductor, R1610C Datasheet - Page 104

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R1610C

Manufacturer Part Number
R1610C
Description
High Performance 16 Bits MCU Integrated One 10/100M Mac Controller - 3.3V Operating Voltage/2.5V Core Voltage
Manufacturer
RDC Semiconductor
Datasheet
R
1. DTST
The TX circuit will stop transmitting packet if the Owner Bit=0
DTST [14:0]: TX Status and packet control. The MAC will update the TX status field after frame transmission is
completed. The control bit is for each packet usage.
R
20.2
12-7
104
3-0
15
Bit
O
15
14
13
6
5
4
15
D
D
TXOK
14
EXCEEDC
C
TX Descriptor Format
C
COLCNT
DISCRC
TXFUR
LATEC
Name
TXOK
Rsvd
O
CRC
DIS
13
®
®
R
R
I
I
S
S
C
C
DTST
DTLEN
DTBP
DTNP
D
D
12
S
S
Attribute
P
P
C
C
o
o
R/W
R/W
m
m
RO
m
m
u
u
11
n
n
i
i
c
c
a
a
t
t
i
i
o
o
n
n
Owner Bit.
Set1: MAC.
Set0: CPU.
TX packet successful. This bit indicates that the packet was transmitted
successfully without error. It includes:
Disable append CRC field.
This is a control bit.
=1: disable CRC append.
=0: enable CRC append on TX packet.
When the status is updated, this bit will keep in previous setting.
Reserved
FIFO Under-Run.
Late Collision.
Exceed Collision.
Collision Counts.
10
Reserved
9
DTNP [19:16]
DTBP [19:16]
3
8
2
(1) No late collision.
(2) No excessive collision.
(3) No TX FIFO under-run.
(4) No lost carrier.
1
0 0
0 0
7
0
TXFUR LATEC
6
Description
5
EXCEE
DC
4
Fast Ethernet RISC Processor
3
2
COLCNT
1
R1610C
October 27, 2003
0
Final Version 1.5
Data Sheet

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