R1610C RDC Semiconductor, R1610C Datasheet - Page 34

• Manufacturer Part Number: R1610C
• Description: High Performance 16 Bits MCU Integrated One 10/100M Mac Controller - 3.3V Operating Voltage/2.5V Core Voltage
• Manufacturer: RDC Semiconductor

R
R
10.2
BMOD
16-bit port). Memory devices exchange information with the CPU during memory read, memory write and
instruction fetch bus cycles. I/O read and I/O write bus cycles use a separate I/O address space. Only IN/OUT
instruction can access I/O address space, and information must be transferred between the peripheral devices
and the AX register. The first 256 bytes of I/O space can be accessed directly by the I/O instructions. The entire
64k bytes I/O address space can be accessed indirectly, through the DX register. I/O instructions always force
address A[19:16] to low level.
10.1.3 A user guide to use shadow memory
34
Register Offset:
Register Name:
Reset Value
1-0
15
Bit
15
D
D
The memory space consists of 1M bytes (512k 16-bit port) and the I/O space consists of 64k bytes (32k
(a) Set Bus Control Register [1:0] (EAh)= 01b (DMA mode).
(b) Configure the DMA source address to be the DMA destination address.
(c) Configure the DMA Transfer Count
(d) Register according to the transfer size you need.
(e) After DMA is transferred, set Bus Control Register [1:0] (EAh) to 2’b10 (Shadow mode).
(f) If the system is 8-bit boot mode, remember to switch to 16-bit mode after shadowing. Otherwise the
SHADM
14
BMOD
Name
C
Memory and I/O Interface
C
OD
code fetching from SDRAM will still be 8-bit mode.
13
®
®
:
Attribute
R
R
I
I
S
S
C
R/W
R/W
C
EAh
Bus Control Register
0000h
D
D
12
S
S
P
P
C
C
o
o
m
m
m
m
u
u
11
Bus Mode Select bit.
Set 0: Slow bus mode. When the PCS region is accessed, the bus cycle is mapped to
Set 1: Normal bus mode. When the PCS region is accessed, the bus cycle is mapped
Memory Shadow Operation Mode.
00: Normal Operation Mode.
01: DMA Operation Mode.
10: Shadow Operation Mode.
The CPU fetches code from the SDRAM.
n
n
i
i
c
c
a
a
t
t
i
i
o
o
n
n
10
SAD [15:0] or SAD [7:0].
to A [19:0] and D [15:0]. The SAD bus is inactive in this mode.
9
8
7
6
Description
5
4
Fast Ethernet RISC Processor
3
2
MOD1
SHAD
1
R1610C
MOD0
SHAD
October 27, 2003
0
Final Version 1.5
Data Sheet