R1610C RDC Semiconductor, R1610C Datasheet - Page 59

• Manufacturer Part Number: R1610C
• Description: High Performance 16 Bits MCU Integrated One 10/100M Mac Controller - 3.3V Operating Voltage/2.5V Core Voltage
• Manufacturer: RDC Semiconductor

R
Data Sheet
Final Version 1.5
October 27, 2003
R
7-6
9
8
5
4
3
2
1
0
D
D
SYN1 –
B_n/W
TDRQ
C
SYN0
C
CHG
EXT
INT
TC
ST
P
®
®
R
R
I
I
S
S
C
C
D
D
S
S
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
P
P
C
C
o
o
m
m
m
m
u
u
n
n
i
i
c
c
a
a
t
t
Set 0: Disable the decrement function.
Terminal Count.
Set 1: The synchronized DMA transfer is terminated when the DMA Transfer Count
Set 0: The synchronized DMA transfer is not terminated when the DMA Transfer
Unsynchronized DMA transfer is always terminated when the DMA Transfer Count
register reaches 0, regardless of the setting of this bit.
Interrupt.
Set 1: DMA unit generates an interrupt request when the transfer count is
The TC bit must be set to 1 to generate an interrupt.
Synchronization Type Selection.
Priority.
Set 1: It selects high priority for this channel when both DMA 0 and DMA 1 are
Timer Enable/Disable Request.
Set 1: Enable the DMA requests from timer 2.
Set 0: Disable the DMA requests from timer 2.
This bit enables the external interrupt functionality of the corresponding DRQ pin.
Set 1: the external pin is an INT pin and requests on the pin are passed to the
interrupt controller.
Set 0: The pin functions as a DRQ pin.
Changed Start Bit. This bit must be set to 1 when the ST bit is modified.
Start/Stop DMA channel.
Set 1: Start the DMA channel
Set 0: Stop the DMA channel
Byte/Word Select.
Set 1: The address is incremented or decremented by 2 after each transfer.
Set 0:The address is incremented or decremented by 1 after each transfer.
Only byte transfer is supported if either source or destination bus width is 8 bit.
i
i
o
o
n
n
B_n/W (bit 0) bit determines the incremented value is by 1 or 2.
Register reaches 0.
Count Register reaches 0.
completed.
transferred in the same time.
SYN1 , SYN0 -- Synchronization Type
1 , 1
0 , 0
0 , 1
1 , 0
-- Reserved
-- Unsynchronized
-- Source synchronized
-- Destination synchronized
Fast Ethernet RISC Processor
R1610C
59