R1610C RDC Semiconductor, R1610C Datasheet - Page 26

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R1610C

Manufacturer Part Number
R1610C
Description
High Performance 16 Bits MCU Integrated One 10/100M Mac Controller - 3.3V Operating Voltage/2.5V Core Voltage
Manufacturer
RDC Semiconductor
Datasheet
R
R
7.5 Fast Ethernet MAC Control Registers (Base Address: MAC / FE00h)
26
Offset
(HEX)
D
CCh Non-Cache region1 Starts Address High
DCh Non-Cache region3 Starts Address High
D
CAh Non-Cache region1 Starts Address Low
CEh Non-Cache region1 End Address Low
DAh Non-Cache region3 Starts Address Low
DEh Non-Cache region3 End Address Low
C2h Non-Cache Region0 Starts Address Low
C8h Non-Cache region0 End Address High
C6h Non-Cache region0 End Address Low
D0h Non-Cache region1 End Address High
D4h Non-Cache region2 Starts Address High
D2h Non-Cache region2 Starts Address Low
D8h Non-Cache region2 End Address High
D6h Non-Cache region2 End Address Low
E0h Non-Cache region3 End Address High
E4h Write-Invalidate region Starts Address High
E2h Write-Invalidate region Starts Address Low
E8h Write-Invalidate region End Address High
E6h Write-Invalidate region End Address Low
0Ch TX Interrupt Control Register
1Ah RX Descriptor Control Register
1Ch MAC Last Status Register
2Ch MAC TX Descriptor Start Address Register 0
3Ch MAC INT Status Register
5Ah MAC Successfully Transmit Packet Counter Register
5Ch MAC Event Counter 4 Register
5Eh MAC Pause Frame Counter Register
00h MAC Control Register 0
04h MAC Control Register 1
08h MAC Bus Control Register
10h RX Interrupt Control Register
14h TX Poll Command Register
18h RX Buffer Size Register
20h MAC MDIO Control Register
24h MAC MII Read Data Register
28h MAC MII Write Data Register
30h MAC TX Descriptor Start Address Register 1
34h MAC RX Descriptor Start Address Register 0
38h MAC RX Descriptor Start Address Register 1
40h MAC INT Enable Register
44h MAC Event Counter INT Status Register
48h MAC Event Counter INT Mask Register
50h MAC Successfully Received Packet Counter
52h MAC Event Counter 0 Register
54h MAC Event Counter 1 Register
56h MAC Event Counter 2 Register
58h MAC Event Counter 3 Register
60h MAC Hash Table Word 0
C
C
Register Name
®
®
R
R
I
I
S
S
C
C
D
D
S
S
P
P
C
C
o
o
m
m
m
m
u
u
n
n
i
i
c
c
a
a
t
t
i
i
o
o
n
n
MCR0
MCR1
MBCR
MTICR
MRICR
MTPR
MRBSR
MRDCR
MLSR
MMDIO
MMRD
MMWD
MTDSA0
MTDSA1
MRDSA0
MRDSA1
MISR
MIER
MECISR
MECIER
MRCNT
MECNT0
MECNT1
MECNT2
MECNT3
MTCNT
MECNT4
MPCNT
MAR0
Mnemonic Page
Fast Ethernet RISC Processor
NCR0EH
NCR1SH
NCR1EH
NCR2SH
NCR2EH
NCR3SH
NCR3EH
NCR0SL
NCR0EL
NCR1SL
NCR1EL
NCR2SL
NCR2EL
NCR3SL
NCR3EL
WIRSH
WIREH
WIRSL
WIREL
100
106
107
108
109
109
120
120
121
121
110
110
112
113
113
113
114
114
115
115
116
116
117
118
118
119
119
119
111
111
93
94
94
95
95
96
95
96
96
97
97
98
97
98
98
99
99
99
R1610C
October 27, 2003
Final Version 1.5
Data Sheet

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