R1610C RDC Semiconductor, R1610C Datasheet - Page 32

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R1610C

Manufacturer Part Number
R1610C
Description
High Performance 16 Bits MCU Integrated One 10/100M Mac Controller - 3.3V Operating Voltage/2.5V Core Voltage
Manufacturer
RDC Semiconductor
Datasheet
R
10.
R
10.1
10.1.1 Normal Bus and Slow Bus
10.1.2 Normal Operation, DMA Operation, and Shadow Operation Mode
mode. Users can fetch codes from the SDRAM instead of the Flash/ROM to increase system performance after
moving the codes from the Flash/ROM to the SDRAM. During shadow mode, the SDRAM space can be extended
from 512K Bytes to 1M Bytes to fetch codes from the SDRAM. The following describes how the memory shadow
works.
32
users may set BMOD bit to “0” in Bus Control Register [15].
pins are used for address and D [15:0] for data. In order to let the CPU access to the I/Os and the MAC
Controller access to the SDRAM work at the same time, the powerful R1610C provides another bus called “slow
bus” to separate SDRAM and I/O access via different pins.
work at the same time via different pins. In this bus mode, SDRAM accesses via MA [10:0] for address and D
[15:0] for data (Check the pin out). I/O accesses external devices via pin SAD [15:0] under 16-bit mode or via pin
SAD [7:0] under 8-bit mode. Only byte access is allowed if 8-bit mode is selected. 16-bit mode or 8-bit mode is
configured by hardware trapping at power on reset via SBWSEL (pin 28).
D
Bus Interface UNIT
D
(a) Normal Operation Mode
There are two kinds of buses, called “normal bus” and “slow bus”, in R1610C. In order to use slow bus,
In normal bus, R1610C use the same pin to process Memory and I/O access to external devices. A [19:0]
In slow bus, the MAC controller access to the SDRAM and the CPU access to the external IO devices can
In order to improve the code fetch speed, R1610C provides one shadow memory operation, called shadow
The default operation mode after reset is normal operation mode. The CPU fetches code from the
Flash/ROM. These two bits, SHADMOD [1:0] in Bus Control Register (EAh), will be 2’b00 as default.
The SDRAM space is from 0 to 512K Bytes.
UCS_n is used for accessing the Flash/ROM and its space is from 80000h to FFFFFh Bytes.
C
Slow Bus and Memory Shadow
C
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R
R
I
I
S
S
C
C
D
D
S
S
P
P
C
C
o
o
m
m
m
m
u
u
n
n
i
i
c
c
a
a
t
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o
n
n
UCS
FFFFFh
80000h
Flash
FFFFFh
00000h
80000h
Fast Ethernet RISC Processor
SDRAM
R1610C
October 27, 2003
Final Version 1.5
Data Sheet

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