R1610C RDC Semiconductor, R1610C Datasheet - Page 37

• Manufacturer Part Number: R1610C
• Description: High Performance 16 Bits MCU Integrated One 10/100M Mac Controller - 3.3V Operating Voltage/2.5V Core Voltage
• Manufacturer: RDC Semiconductor

R
Data Sheet
Final Version 1.5
October 27, 2003
R
10.5
memory or I/O access is located in the SDRAM or PCSx_n address space. The UCS_n code- fetched selection
can be 8-bit or 16-bit bus width, which is decided by the BWSEL pin (pin42) input status when the RST_n pin
goes from low to high. When the BWSEL pin is with a pull-low resistor, the bus width for the code-fetched
selection is 8 bits. The SDRAM bus width is unchangeable 16 bits. If the R1610C has been set as 16-bit mode, it
cannot be changed to 8-bit mode.
PCS6 PCS5 PCS3 PCS2 PCS1
Register Offset:
Register Name:
Reset Value
10-8
6-2
15
Bit
15
14
13
12
11
7
1
0
D
D
The R1610C default is 16-bit bus access and the bus can be programmed as 8-bit or 16-bit access during
14
Name
MMIO
PCS6
PCS5
PCS3
PCS2
PCS1
PCS0
Rsvd
USIZ
Rsvd
C
Bus Width
C
13
®
®
:
Attribute
R
R
I
I
S
S
C
R/W
R/W
R/W
R/W
R/W
R/W
R/W
C
RO
RO
RO
F2h
Auxiliary Configuration Register
0080h or 0000h
D
D
12
S
S
P
P
C
C
o
o
m
m
m
m
u
u
11
I/O Space Data Bus Size selection. This bit determines the width of the data bus for
all I/O space accesses. 1: 8-bit data bus access. 0: 16-bit data bus access.
I/O Space Data Bus Size selection. This bit determines the width of the data bus for
all I/O space accesses. 1: 8-bit data bus access. 0: 16-bit data bus access.
I/O Space Data Bus Size selection. This bit determines the width of the data bus for
all I/O space accesses. 1: 8-bit data bus access. 0: 16-bit data bus access.
I/O Space Data Bus Size selection. This bit determines the width of the data bus for
all I/O space accesses. 1: 8-bit data bus access. 0: 16-bit data bus access.
I/O Space Data Bus Size selection. This bit determines the width of the data bus for
all I/O space accesses. 1: 8-bit data bus access. 0: 16-bit data bus access.
Reserved
Boot code bus width. This bit reflects the BWSEL pin input status when the RST_n pin
goes from low to high.
Set 0: 16-bit bus width booting when the BWSEL pin is without a pull-low resistor.
Set 1: 8-bit bus width booting when the BWSEL pin is with a 4.7k ohm external
Reserved
Memory Mapped IO. If mapped to memory space, this bit determines the width of the
data bus for all PCS space accesses.
1: 8-bit data bus access.
0: 16-bit data bus access.
I/O Space Data Bus Size selection. This bit determines the width of the data bus for
all I/O space accesses. 1: 8-bit data bus access. 0: 16-bit data bus access.
n
n
i
i
c
c
a
a
t
t
i
i
o
o
n
n
10
(Default: It is an internal pull-high resistor.)
pull-low resistor.
Reserved
9
8
USIZ
7
6
0
Description
5
0
4
0
Fast Ethernet RISC Processor
3
0
2
0
MMIO PCS0
1
R1610C
0
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