R1610C RDC Semiconductor, R1610C Datasheet - Page 46

• Manufacturer Part Number: R1610C
• Description: High Performance 16 Bits MCU Integrated One 10/100M Mac Controller - 3.3V Operating Voltage/2.5V Core Voltage
• Manufacturer: RDC Semiconductor

R
R
15-4
15-8
46
Register Offset:
Register Name:
Reset Value
2-0
6-5
2-0
Bit
15
Bit
3
7
4
3
D
D
PR[2:0]
PR[2:0]
14
Name
Name
Rsvd
Rsvd
Rsvd
MSK
ETM
MSK
C
LTM
C
13
®
®
:
Attribute
Attribute
R
R
I
I
S
S
C
C
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
40h
MAC Interrupt Control Register
000Fh
D
D
12
Reserved
S
S
P
P
C
C
o
o
m
m
m
m
u
u
11
n
n
Reserved
Mask.
Set 1: Mask the interrupt source of the asynchronous serial port 1.
Set 0: Enable the serial port 1 interrupt.
Priority. These bits determine the priorities of the serial ports relative to the other
interrupt signals.
Reserved
Edge trigger mode enabled. When this bit is set to 1 and bit 4 is cleared to 0, an
interrupt is triggered by edge from MAC, which goes from low to high. The low to high
edge will be latched (one level) till this interrupt is serviced.
Reserved
Level-Triggered Mode.
Set 1: An interrupt is triggered by the high active level.
Set 0: An interrupt is triggered by the low to high edge.
Mask.
Set 1: Mask the interrupt source of MAC.
Set 0: Enable the MAC interrupt.
Interrupt Priority. These bit settings for priority selections are the same as those of
bit[2:0] for the 44h register.
i
i
c
c
a
a
t
t
i
i
o
o
n
n
10
PR[2:0]
The priority selection:
000
001
010
011
100
101
110
111
9
8
ETM
7
Priority
(Low) 7
(High) 0
6
Reserved
3
6
1
2
4
5
Description
Description
5
LTM
4
Fast Ethernet RISC Processor
MSK
3
PR2
2
PR1
1
R1610C
PR0
October 27, 2003
0
Final Version 1.5
Data Sheet