R1610C RDC Semiconductor, R1610C Datasheet - Page 107

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R1610C

Manufacturer Part Number
R1610C
Description
High Performance 16 Bits MCU Integrated One 10/100M Mac Controller - 3.3V Operating Voltage/2.5V Core Voltage
Manufacturer
RDC Semiconductor
Datasheet
R
Data Sheet
Final Version 1.5
October 27, 2003
R
20.4
AUCP WIDX
13-10
Register Offset:
Register Name:
Reset Value
7-6
5-4
3-2
15
Bit
15
14
1
0
9
8
1
0
D
D
EITH [1:0]
14
ACRCER
MAXLEN
RCVEN
C
MCR1: MAC Control Register 1 (04h)
C
AUCP
MRST
Name
WIDX
Rsvd
Rsvd
ECR
LBM
TPF
[1:0]
13
®
®
:
R
R
I
I
S
S
C
Attribute
C
04h
MCR1: MAC Control Register 1
0010h
D
D
12
Reserved
S
S
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/O
P
P
RO
RO
C
C
o
o
m
m
m
m
u
u
11
n
n
i
i
c
c
a
a
t
t
Set 0: Disable to accept runt packets.
Accept CRC Error packet.
Set 1: Enable.
Set 0: Disable.
Receive Enable.
Set 1: Enable packet receive.
Set 0: Disable packet receive.
Excessive Collision Retransmit times.
0: 16 times. (Default)
Early Interrupt Threshold.
00: 1129 bytes. (Default)
01: 1257 bytes.
10: 1385 bytes.
11: 1513 bytes.
Maximum Packet Length Selector. Define the length of long packets.
01: 1518 bytes. (Default)
10: 1522 bytes.
11: 1534 bytes.
00: 1537 bytes.
Reserved
Loop-Back mode.
0: Normal Mode. (Default)
1: MAC Loop-Back.
MAC Reset.
Set 1 to reset MAC.
Filter uni-cast packet by hash-table.
Set 1: Enable.
Set 0: Disable.
Write the hash index number.
Set 1: Enable to write the HIDX [5:0] into Rx descriptor.
Set 0: Disable this function.
Reserved
Trigger Pause Frame to be transmitted.
If flow control (FCEN bit in MCR0 [9]) is enabled, this bit will be set automatically
when received descriptor unavailable happens. TPF refers to XMTEN bit (MCR0
[12]). When XMTEN bit is set, the pause frame can be sent.
1: 32 times.
i
i
o
o
n
n
10
TPF
9
ECR
8
EITH [1:0]
7
6
MAXLEN [1:0]
Description
5
4
Fast Ethernet RISC Processor
3
0
2
0
LBM
1
R1610C
MRST
0
107

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