R1610C RDC Semiconductor, R1610C Datasheet - Page 35

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R1610C

Manufacturer Part Number
R1610C
Description
High Performance 16 Bits MCU Integrated One 10/100M Mac Controller - 3.3V Operating Voltage/2.5V Core Voltage
Manufacturer
RDC Semiconductor
Datasheet
R
Data Sheet
Final Version 1.5
October 27, 2003
R
10.3
banks of up to 512k bytes. Each bank connects to the lower half of the data bus and contains the even-addressed
bytes (A0=0). The other bank connects to the upper half of the data bus and contains odd-addressed bytes
(A0=1). A0 determines whether one bank or both banks participate in the data transfer.
D
D
The memory address space data bus is physically implemented by dividing the address space into two
C
Data Bus
C
®
®
R
R
I
I
S
S
C
C
D
D
S
S
P
P
C
C
o
o
m
m
m
m
u
u
FFFFFH
n
n
i
i
c
c
a
a
t
t
i
i
A19:1
o
o
n
n
0
Memory
Space
512K Bytes
FFFFF
FFFFD
D15:8
Memory and I/O Space
5
3
1
Physical Data Bus Models
1M Bytes
A0
0FFFFH
0
Space
I/O
512K Bytes
FFFFE
FFFFC
D7:0
4
2
0
Fast Ethernet RISC Processor
64K Bytes
A0
R1610C
35

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