R1610C RDC Semiconductor, R1610C Datasheet - Page 47

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R1610C

Manufacturer Part Number
R1610C
Description
High Performance 16 Bits MCU Integrated One 10/100M Mac Controller - 3.3V Operating Voltage/2.5V Core Voltage
Manufacturer
RDC Semiconductor
Datasheet
R
Data Sheet
Final Version 1.5
October 27, 2003
R
Register Offset:
Register Name:
Register Offset:
Register Name:
Reset Value
15-8
Register Offset:
Register Name:
Reset Value
15-8
2-0
15
Bit
15
Bit
7
6
5
4
3
7
D
D
PR[2:0]
14
14
Name
Name
Rsvd
Rsvd
Rsvd
ETM
MSK
ETM
ELS
LTM
C
C
13
13
®
®
:
:
Attribute
Attribute
R
R
I
I
S
S
C
C
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
3Eh
Reserved
3Ch
INT2 Control Register
000Fh
3Ah
INT1 Control Register
000Fh
D
D
12
12
Reserved
Reserved
S
S
P
P
C
C
o
o
m
m
m
m
u
u
11
11
n
n
Reserved
Edge trigger mode enabled. When this bit is set and bit 4 is cleared to 0, an interrupt
is triggered by the edge going from low to high. The low to high edge will be latched
(one level) till this interrupt is serviced.
Reserved
Edge/Level Select
Set 1 = Falling edge/Low level trigger.
Set 0 = Rising edge/High level trigger.
Level-Triggered Mode.
Set 1: An Interrupt is triggered by level.
Set 0: An interrupt is triggered by edge.
Mask.
Set 1: Mask the interrupt source of INT2.
Set 0: Enable the INT2 interrupt.
Interrupt Priority.
These bit settings for priority selections are the same as those of bit 2-0 for the 44h
register.
Reserved
Edge trigger mode enabled. When this bit is set and bit 4 is cleared to 0, an interrupt
is triggered by the edge going from low to high. The low to high edge will be latched
(one level) till this interrupt is serviced.
i
i
c
c
a
a
t
t
i
i
o
o
n
n
10
10
9
9
8
8
ETM
ETM
7
7
SFNM
Rsvd
6
6
Description
Description
ELS
ELS
5
5
LTM
LTM
4
4
Fast Ethernet RISC Processor
MSK
MSK
3
3
PR2
PR2
2
2
PR1
PR1
1
1
R1610C
PR0
PR0
0
0
47

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