R1610C RDC Semiconductor, R1610C Datasheet - Page 62

• Manufacturer Part Number: R1610C
• Description: High Performance 16 Bits MCU Integrated One 10/100M Mac Controller - 3.3V Operating Voltage/2.5V Core Voltage
• Manufacturer: RDC Semiconductor

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device at least three clock cycles from the time it is acknowledged to dessert its DRQ line.
differs from a source-synchronized transfer in which two idle states are added to the end of the deposit cycle. The
two idle states extend the DMA cycle to allow the destination device to de-assert its DRQ pin four clocks before the
end of the cycle. If the two idle states were not inserted, the destination device would not have time to de-assert its
DRQ signal.
R
62
D
D
The Destination-Synchronized Transfer figure shows the typical destination-synchronized transfer, which
C
C
DRQ(Case1)
DRQ(Case2)
®
®
CLKOUTA
R
R
I
I
S
S
C
C
D
D
S
S
DRQ(Case1)
P
P
DRQ(Case2)
C
CLKOUTA
C
o
o
m
m
m
m
NOTES:
Case1 : Current destination synchronized transfer will not be immediately
Case2 : Current destination synchronized transfer will be immediately
u
u
n
n
i
i
c
c
a
a
t
t
i
i
o
o
n
n
T1
NOTES:
Case1 : Current source synchronized transfer will not be immediately
Case2 : Current source synchronized transfer will be immediately
followed by another DMA transfer.
followed by another DMA transfer.
Destination-Synchronized Transfers
followed by another DMA transfer.
followed by antoher DMA transfer.
Fetch Cycle
T2
Source-Synchronized Transfers
T1
T3
Fetch Cycle
T2
T4
T3
T1
T4
Deposit Cycle
T2
T1
T3
Fetch Cycle
T2
Fast Ethernet RISC Processor
T4
T3
TI
T4
TI
R1610C
October 27, 2003
Final Version 1.5
Data Sheet