cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 101

• Manufacturer Part Number: cx29503
• Description: Cx29503 Broadband Access Multiplexer Data Sheet
• Manufacturer: Mindspeed Technologies

3.1
3.2
29503-DSH-002-B
Address/Data Bus
Bus Control Signals
3.0 Parallel Microprocessor
The Parallel Microprocessor interface defines an asynchronous 8-bit data bus
connection between the device and an external microprocessor. It provides the
capability of configuring the device, reading status registers and counters, and
responding to interrupts.
The address lines A[15:0] provide the address for register access. The data bytes flow
over the bidirectional, byte-wide bus, AD[7:0]. Note that when connecting to a bus
master which generates multiplexed addresses and data (like the CX28500 HDLC
controller), the AD[7:0] signals must be externally tied to the A[7:0] signals.
Four signals control the operation of the interface port. The control signals are AS_N,
CS_N, DS_N, and R/W_N. Please look at
EBUS read and write timing diagrams.
Interface
Mindspeed Technologies™
Preliminary Information
Figures 9-4
and 9-5, respectively, for
3
-
1