cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 195

no-image

cx29503

Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
CX29503 Data Sheet
8.3.2.9
Five transmit Sa-Byte buffers (TSA4–TSA8) are used to insert Sa-bits in TS0. The entire group of 40 bits is
sampled every 16 frames, coincident with the TMF interrupt boundary [addr: 008]. Bit 0 from each TSA
register is then inserted during Frame 1, Bit 1 during Frame 3, Bit 2 during Frame 5 and so on. This gives the
processor up to 2 ms after the TMF interrupt to write new Sa-Byte buffer values. Transmit Sa-bits maintain a
fixed relationship to the transmit CRC multiframe.
0x7B—Transmit Sa4 Byte Buffer (TSA4)
TSA4[7]
TSA4[6]
TSA4[5]
TSA4[4]
TSA4[3]
TSA4[2]
TSA4[1]
TSA4[0]
0x7C—Transmit Sa5 Byte Buffer (TSA5)
TSA5[7]
TSA5[6]
TSA5[5]
TSA5[4]
TSA5[3]
TSA5[2]
TSA5[1]
TSA5[0]
29503-DSH-002-B
TSA4[7]
TSA5[7]
7
7
Sa4 bit transmitted in Frame 15
Sa4 bit transmitted in Frame 13
Sa4 bit transmitted in Frame 11
Sa4 bit transmitted in Frame 9
Sa4 bit transmitted in Frame 7
Sa4 bit transmitted in Frame 5
Sa4 bit transmitted in Frame 3
Sa4 bit transmitted in Frame 1
Sa5 bit transmitted in Frame 15
Sa5 bit transmitted in Frame 13
Sa5 bit transmitted in Frame 11
Sa5 bit transmitted in Frame 9
Sa5 bit transmitted in Frame 7
Sa5 bit transmitted in Frame 5
Sa5 bit transmitted in Frame 3
Sa5 bit transmitted in Frame 1
TSA4[6]
TSA5[6]
6
6
Transmit Sa-Byte Buffers
TSA4[5]
TSA5[5]
5
5
Mindspeed Technologies™
TSA4[4]
TSA5[4]
Preliminary Information
4
4
TSA4[3]
TSA5[3]
3
3
TSA4[2]
TSA5[2]
2
2
TSA4[1]
TSA5[1]
1
1
Register Description
TSA4[0]
TSA5[0]
0
0
8
-
65

Related parts for cx29503