cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 189

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cx29503

Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
CX29503 Data Sheet
INS_MF
INS_FE
INS_CRC
INS_FBIT
29503-DSH-002-B
Insert Multiframe Alignment—The frame formatter outputs a 6-bit SF alignment pattern in T1
mode or a 6-bit MFAS alignment pattern in E1 mode. INS_MF should be set while TFRAME
(addr: 070) selects Fs (T1) or MFAS (E1) alignment.
Insert FEBE— During E1 mode, the alarm formatter automatically outputs TS0 bit 1 of
Frame 13 (FEBE13) and Frame 15 (FEBE15) in response to received CRC4 errors. FEBE13 is
active-low for each received CRC4 error detected in SMF I. FEBE15 is active-low for each
received CRC4 error detected in SMF II. INS_FE should be set while TFRAME (addr: 070)
selects FEBE (E1) alignment.
Insert Cyclic Redundancy Check—The frame formatter outputs the calculated CRC6 bits in
T1 mode or CRC4 bits in E1 mode.
Insert Terminal Framing—The frame formatter outputs a 2-bit Ft alignment pattern in
F-bits of odd frames (SF framing) or FPS framing pattern (ESF framing) during T1 modes—or
8-bit FAS/NFAS alignment pattern during E1 modes. INS_FBIT should be set while TFRAME
(addr: 070) selects Ft (T1, SF), FPS (T1, ESF), or FAS (E1) alignment.
0 = do not insert multiframe alignment
1 = insert multiframe alignment
0 = do not insert FEBE
1 = insert FEBE
0 = do not insert cyclic redundancy check
1 = insert cyclic redundancy check
0 = do not insert terminal framing
1 = insert terminal framing
Mindspeed Technologies™
Preliminary Information
Register Description
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