cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 154

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cx29503

Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
Register Description
Table 8-6. Criteria for Loss/Recovery of Receive Framer Alignment <tableContinuation>(2 of 2)
T1/E1N
8-24
ESF
Mode
Global T1/E1 Select—Affects all functions by enabling receive and transmit circuits to operate
at either the T1 or E1 line rate. The processor should re initialize all control register settings
after changing the T1/E1N control bit. T1/E1N selects the nominal line rate (shown below)
while the exact receive and transmit line rate frequencies are independently determined by
their respective input clock or input data references. The actual receive and transmit line
frequency can vary within defined tolerances.
Extended Superframe alignment is recovered when a valid FPS candidate is located (001011). Candidate bits
are each separated by 772 digits and are received without pattern errors.
If there is only one valid FPS candidate and the mode is one of the following:
If there are two or more valid FPS candidates and the mode is one of the following:
During any ESF mode, LOF alignment (FRED) is declared when the number of FPS pattern errors detected
meets selected loss of frame criteria [RLOFA–RLOFC; addr: 040].
No CRC mode—then align to FPS, regardless of CRC6 comparison.
Mimic CRC mode—then align to FPS, regardless of CRC6 comparison.
Force CRC mode—then align to FPS, only if CRC6 is correct.
No CRC mode—then do not align (INVALID status).
Mimic CRC mode—then align to the first FPS with correct CRC6.
Force CRC mode—then align to the first FPS with correct CRC6.
0 = 2.048 MHz line rate (E1)
1 = 1.544 MHz line rate (T1)
Mindspeed Technologies™
Preliminary Information
Description
CX29503 Data Sheet
29503-DSH-002-B

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