cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 257

• Manufacturer Part Number: cx29503
• Description: Cx29503 Broadband Access Multiplexer Data Sheet
• Manufacturer: Mindspeed Technologies

CX29503 Data Sheet
0x5240—DS3/E3 Maintenance Status Register
The DS3/E3 Maintenance Status register contains the major DS3/E3 maintenance indicators.
Value after reset:
Direction:
Value after enable:
ReFrm
LOSAlm
IdleDet
YelDet
AISDet
OOFAlm
0x5241—Interrupt Request Register (IRR)
An IRR bit is latched active (high) whenever an enabled interrupt source reports an interrupt event in the
corresponding status register. The IRR is latched until the corresponding ISR register is read by the processor.
Reading the ISR clears the respective IRR bit independently of clearing ISR bits. Therefore, persistently active
ISR bits will not affect INTR* deactivation.
All IRR bits are logically ORed to activate a corresponding bit in the DS3/E3 bit in the Top Level Interrupt
Status register. The processor must read IRR = 00 before exiting its interrupt service routine to confirm that all
the DS3/E3 Interrupt Request Register bits have been deasserted.
See
interrupt request.
29503-DSH-002-B
Top Level—contains the interrupt request status from the DS3/E3 framer.
Second Level—contains the interrupt request from 6 functional blocks in the DS3/E3 framer. One register
read is required to determine which functional block is requesting service.
Third Level—contains the interrupt source within the particular functional block. One register read is
required before servicing the request.
ReFrm
Figure 8-5
7
for the DS3/E3 Framer interrupt structure. It requires searching 3 levels to respond to an
Reserved
81(h)
Read only
If the RefrmSbp bit is clear—18(h). If the RefrmSbp bit is set—01(h).
Reframe In-Progress—Set while the framing circuit searches for a valid framing pattern in
either DS3 or E3 modes.
Loss-Of-Signal (LOS) Alarm—Indicates that the received signal prior to B3ZS/HDB3
decoding has been lost. This signal is set as soon as the receiver detects the LOS condition and
clears when the receiver detects a legal signal.
Idle Code Detect—Set if an idle pattern is found. This bit is low in E3 modes because there is
no defined E3 idle signal.
Yellow Alarm Detect—Set when an RAI/RDI event is detected in the receiver.
Alarm Indication Signal (AIS) Detect—Set if the receiver detects an AIS event.
Out-Of-Frame (OOF) Alarm—Set when an OOF condition is detected by the receiver. This
condition will initiate a reframe.
6
Reserved
5
Mindspeed Technologies™
LOSAlm
Preliminary Information
4
IdleDet
3
YelDet
2
AISDet
1
Register Description
OOFAlm
0
8
-
127