cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 161
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cx29503
Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
1.CX29503.pdf
(388 pages)
- Current page: 161 of 388
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CX29503 Data Sheet
0x09—Data Link 1 Interrupt Status (ISR2)
All events in ISR2 are from rising edge sources. Each event is latched active-high and held until the processor
read clears ISR2. Each event triggers an interrupt if the corresponding IER2 bit is enabled [addr: 011].
TBOP
RFULL1
RNEAR1
RMSG1
TDLERR1
TEMPTY1
TNEAR1
TMSG1
0x0A—Data Link 2 Interrupt Status (ISR1)
All events in ISR1 are from rising edge sources. Each event is latched active-high and held until the processor
read clears ISR1. Each event triggers an interrupt if the corresponding IER1 bit is enabled [addr: 012].
RBOP
29503-DSH-002-B
RBOP
TBOP
7
7
RESERVED
BOP Code Word Transmitted—Set when a valid Bit-Oriented Code Word has been transmitted
and a new TBOP value can be written [TBOP; addr: 0A1].
Receive FIFO Full—In HDLC modes, RFULL is set when the data link receiver attempts to
write received data to a full FIFO, causing the receive data link FIFO to overrun. In
unformatted modes (Pack6 and Pack8), RFULL is set when the receive FIFO is filled to the
MSG_FILL limit selected in register RDL1_FFC [addr: 0A7].
Receive FIFO Near Full—Set when the receive FIFO fill level reaches the near-full threshold
selected in register RDL1_FFC [addr: 0A7].
Message Received—Set when a complete message or a partial message is received and
available in the receiver FIFO.
Transmit FIFO Error—Set when the FIFO underruns as a result of the internal logic emptying
the FIFO without encountering an end-of-message [TDL1_EOM; addr: 0AC]. The underrun
condition also forces transmission of an HDLC abort code.
Transmit FIFO Empty—Set when the FIFO overflows as a result of the processor attempting to
write to a full FIFO. Overflow data is ignored by the transmit FIFO.
Transmit FIFO Near Empty —Set when the transmit FIFO level falls below the threshold
selected in register TDL1_FEC [addr: 0AB].
Message Transmitted—Set when a complete message has been transmitted and the closing
flag is beginning transmission.
BOP Codeword Received—Set when a valid Bit Oriented Codeword is received and available
in the RBOP register [addr 0A2].
RFULL1
6
6
RESERVED
RNEAR1
5
5
Mindspeed Technologies™
RESERVED
RMSG1
Preliminary Information
4
4
RESERVED
TDLERR1
3
3
RESERVED
TEMPTY1
2
2
RESERVED
TNEAR1
1
1
Register Description
RESERVED
TMSG1
0
0
8
-
31
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