cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 256

• Manufacturer Part Number: cx29503
• Description: Cx29503 Broadband Access Multiplexer Data Sheet
• Manufacturer: Mindspeed Technologies

Register Description
RxFCSEn
RxDLEn
0x5232—Receive Data Link Threshold Control Register
Default after reset:
Direction:
Modification:
RxNFThr[6:0]
0x5233—Transmit FEAC Channel Byte
Default after reset:
Direction:
Modification:
TxFEAC[7:0]
8-126
TxFEAC[7]
Reserved
7
7
RxNFThr [6]
TxFEAC[6]
Receive DL FCS check Enable—Set to enable execution of an FCS check on the received
message. When cleared, the FCS check is executed by software; therefore, no interrupt or
status due to bad FCS will appear.
Receive DL Enable—Set to enable operation of the receive data link FIFO buffer and HDLC/
LAPD circuits over the selected data link channel (Cb5 or N-bit or NR or GC). When cleared,
the data link channel data is left unchanged (may be presented on the data stream via the
REXTCK and RXGAPCK clocks), and no receive datalink interrupts (enabled in this register)
are asserted.
7F(h)
Read/Write
DL-static
Receive DL FIFO Near-Full Threshold—Set to the threshold value, used to indicate a near-full
FIFO event. The range of values available for this purpose is 2–127, when 02(h) is interpreted
as 2 and 7F(h) is interpreted as 127.
FF(h)
Read/Write
Dynamic
Transmit FEAC Channel Message Byte—If the mode is set to DS3-C Bit Parity, this register is
used as the data byte for the Transmit FEAC channel transmitter. When this byte is in the form
'0xxxxxx0', it is transmitted after every flag. If there is a 1 in either the most significant or least
significant bit of this register, all 1s (idle) will be transmitted on the FEAC channel. An
interrupt is associated with this channel and is enabled by the TxFEACIE bit in the Feature3
control register. The TxFEAC[0] bit is transmitted first and the TxFEAC[7] bit is transmitted
last.
6
6
RxNFThr [5]
TxFEAC[5]
5
5
Mindspeed Technologies™
RxNFThr [4]
TxFEAC[4]
Preliminary Information
4
4
RxNFThr [3]
TxFEAC[3]
3
3
RxNFThr [2]
TxFEAC[2]
2
2
RxNFThr [1]
TxFEAC[1]
1
1
CX29503 Data Sheet
29503-DSH-002-B
RxNFThr [0]
TxFEAC[0]
0
0