cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 173

• Manufacturer Part Number: cx29503
• Description: Cx29503 Broadband Access Multiplexer Data Sheet
• Manufacturer: Mindspeed Technologies

CX29503 Data Sheet
RPATT[1:0]
0x42—Receive Loopback Code Detector Configuration (RLB)
Unused bits should be written to 0.
DN_LEN[1:0]
UP_LEN[1:0]
29503-DSH-002-B
—
7
PRBS Test Pattern—Selects one of four PRBS test pattern lengths used to measure the
received bit error ratio during out-of-service testing. See
measurement options. PRBS test patterns used by RPATT [addr: 041] and TPATT [addr: 076]
are defined in ITU Standards O.151 and O.152 to use either inverted or non-inverted data.
Standard data inversion is used for selected PRBS test patterns unless ZLIMIT is enabled, in
which case the test pattern always uses non-inverted data.
Loopback Deactivate Code Length—Selects the number of loopback pattern bits from LBD
[addr: 044] that are compared to received data. This is done to determine whether a Loopback
Deactivate Code [LOOPDN; addr: 048] has been detected. LOOPDN is recovered if the
received data pattern contains fewer than 63 bit errors in a 24-ms period, or lost if 64 or more
bit errors are detected in a subsequent 24-ms period. F-bits that overwrite or are inserted into
the loopback pattern are not counted as bit errors. Accurate code detection is provided on lines
with up to 1
Loopback Activate Code Length—Selects the number of loopback pattern bits from LBA
[addr: 043] that are compared to received data. This is done to determine whether a Loopback
Activate Code [LOOPUP; addr: 048] has been detected. LOOPUP is recovered if the received
data pattern contains fewer than 63 bit errors in a 24-ms period, or lost if 64 or more bit errors
are detected in a subsequent 24-ms period. F-bits that overwrite or are inserted into the
loopback pattern are not counted as bit errors. Accurate code detection is provided on lines
with up to 1
—
6
-3
-3
DN_LEN
BER.
BER.
UP_LEN
—
00
01
10
11
00
01
10
11
5
Mindspeed Technologies™
Preliminary Information
—
4
LBD Length
LBA Length
4 bits
5 bits
6 bits
7 bits
4 bits
5 bits
6 bits
7 bits
DN_LEN[1]
3
DN_LEN[0]
Table 8-14
2
for test pattern
UP_LEN[1]
1
Register Description
UP_LEN[0]
0
8
-
43