cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 277

• Manufacturer Part Number: cx29503
• Description: Cx29503 Broadband Access Multiplexer Data Sheet
• Manufacturer: Mindspeed Technologies

CX29503 Data Sheet
0x54C6—DS2/E2 Framer 7 Alarm Start Interrupt Enable
Reset State
OOF STRT IE
RAI STRT IE
AIS STRT IE
LOS STRT IE
RSRVBIT STRT IE
0x5407—DS2/E2 Framer 1 Alarm End Interrupt Enable
0x5427—DS2/E2 Framer 2 Alarm End Interrupt Enable
0x5447—DS2/E2 Framer 3 Alarm End Interrupt Enable
0x5467—DS2/E2 Framer 4 Alarm End Interrupt Enable
0x5487—DS2/E2 Framer 5 Alarm End Interrupt Enable
0x54A7—DS2/E2 Framer 6 Alarm End Interrupt Enable
29503-DSH-002-B
—
7
0x00
OOF Start Interrupt Enable—A 1 enables interrupts due to detection of the start of an OOF
event. A 0 indicates that the status bit will be set at the start of an OOF event, but an interrupt
will not be generated.
RAI Start Interrupt Enable—A 1 enables interrupts due to detection of the start of an RAI
event. A 0 indicates that the status bit will be set at the start of an RAI event, but an interrupt
will not be generated.
AIS Start Interrupt Enable—A 1 enables interrupts due to detection of the start of an AIS
event. A 0 indicates that the status bit will be set at the start of an AIS event, but an interrupt
will not be generated.
LOS Start Interrupt Enable—A 1 enables interrupts due to detection of the start of an LOS
event. A 0 indicates that the status bit will be set at the start of an LOS event, but an interrupt
will not be generated.
Reserved Bit Start Interrupt Enable—A 1 enables interrupts due to the detection of the start of
a reserved bit event. A 0 indicates that the status bit will be set at the start of a reserved bit
event, but an interrupt will not be generated.
—
6
—
5
Mindspeed Technologies™
RSRVBIT
STRT IE
Preliminary Information
4
LOS STRT IE
3
AIS STRT IE
2
RAI STRT IE
1
Register Description
OOF STRT IE
0
8
-
147