cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 306
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cx29503
Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
1.CX29503.pdf
(388 pages)
- Current page: 306 of 388
- Download datasheet (5Mb)
Register Description
0x6084—Receive Status/Counter Latching Control
Reset State
EnErrLat
EnStatLat
BlkCnt
PerCap
0x6085—Receive Microprocessor Interface Fast Access Control
Reset State
FastAccess
8-176
—
—
7
7
0x00
One-second latching is enabled for all Receive Error counters when set; otherwise, error count
information is updated continuously up to counter saturation.
One-second latching is enabled for all Receive Status counters when set; otherwise, status
count information is updated continuously up to counter saturation.
When set, BIP or REI errors received increments the respective error counter by 1 count for
each errored frame; otherwise, the actual number of BIP or REI errors received is added to the
respective error counter.
All Overhead Receive Capture registers, except trace buffers, have a persistence capture where
the captured value changes only after 3 consecutive frames of a consistent value when set;
otherwise, the Overhead Capture registers contain the current values.
0x00
Setting this bit removes the metastability guard and reduces access time by ½ clock cycle.
—
—
6
6
—
—
5
5
Mindspeed Technologies™
Preliminary Information
—
—
4
4
PerCap
—
3
3
BlkCnt
—
2
2
EnStatLat
—
1
1
CX29503 Data Sheet
29503-DSH-002-B
FastAccess
EnErrLat
0
0
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