cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 276

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cx29503

Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
Register Description
0x54C5—DS2/E2 Framer 7 Counter/Loopback Interrupt Enable
Reset State
FBEIE
MBEIE
PERIE
GFBEIE
LPBKIE
0x5406—DS2/E2 Framer 1 Alarm Start Interrupt Enable
0x5426—DS2/E2 Framer 2 Alarm Start Interrupt Enable
0x5446—DS2/E2 Framer 3 Alarm Start Interrupt Enable
0x5466—DS2/E2 Framer 4 Alarm Start Interrupt Enable
0x5486—DS2/E2 Framer 5 Alarm Start Interrupt Enable
0x54A6—DS2/E2 Framer 6 Alarm Start Interrupt Enable
8-146
7
0x00
F-Bit Error Interrupt Enable—When set to 1, enables the interrupts from the Frame error
counter for that channel. When cleared to 0, the corresponding status bit will be set but an
interrupt will not be generated.
M-Bit Error Interrupt Enable—When set to 1, enables the interrupts from the M-bit error
counter. When cleared to 0, the corresponding status bit will be set but an interrupt will not be
generated.
Parity Error Interrupt Enable—When set to 1, enables the interrupts from the Parity bit error
counter. When cleared to 0, the corresponding status bit will be set but an interrupt will not be
generated.
G747 Framing Bit Error Interrupt Enable—When set to 1, enables the interrupts from the
G.747 Framing bit error counter. In E13 mode, framing errors are counted. When cleared to 0,
the corresponding status bit will be set but an interrupt will not be generated.
Enable Interrupts Due to DS2 Loopback—When set to 1, an interrupt will be asserted
whenever a DS2 loopback code is detected in the incoming DS3 stream. When cleared to 0, the
corresponding status bit will be set but an interrupt will not be generated. This bit has no effect
in M13-bit parity applications and E13 mode.
6
5
Mindspeed Technologies™
LPBKIE
Preliminary Information
4
GFBEIE
3
PERIE
2
MBEIE
1
CX29503 Data Sheet
29503-DSH-002-B
FBEIE
0

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