cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 230

• Manufacturer Part Number: cx29503
• Description: Cx29503 Broadband Access Multiplexer Data Sheet
• Manufacturer: Mindspeed Technologies

Register Description
8.4.1
0x5000—M13/E13 System Control Register
Reset State
OneSecMode
M13 Mode
upl3txclksel[1:0]
0x5006—DS3/E3 Framer Control Register
FrEnable
8-100
Reset State
FrEnable
—
7
7
M13 Mode
0x00
One-Second Latching Mode.
Set to operate M13 in Unchannelized mode; clear to operate M13 in Channelized mode (see
Figure
Specifies the transmit clock sent to the DS3/E3 Framer (see
0x00
DS3/E3 framer enabled when set to 1
M13/E13 Global Status and Control Registers
—
6
6
• 0x0—selects the receive line clock from either the external RLINECLK or the
• 0x1—selects the external CLK_DS3 or CLK_E3 clock depending on the value of the
• 0x2 or 0x3—selects the external dejittered Receive Line clock (RXCKI).
2-2).
SONET module depending on the value of the CK_SRC[1:0] pins. If CK_SRC[1:0] =
0x0 or 0x1, then the SONET module clock is used. If CK_SRC[1:0] = 0x2, or 0x3,
then the external RLINKECLK is used.
TXE3_CLK in the Clock Configuration register in the Clock and Test block. If
TXE3_CLK = 0x1, then CLK_E3 is used, otherwise, CLK_DS3 is used.
NOTE:
NOTE:
NOTE:
—
5
—
5
Mindspeed Technologies™
The value of this register in conjunction with the value on the 1-second interrupt
enable input controls the mode of the DS3/E3 Framer and DS2/E2 Framer
performance monitoring counters, i.e., saturating or rollover. This bit replaces
CX28342/3/4/6/8 DS3/E3 Framer GCR01 Bit 1.
The M13 Mode is updated when FrEnable in the DS3/E3 Framer Control Register
[addr:0x5006] is changed from 0 to 1.
Bit 7 replaces the CX28342/3/4/6/8 DS3 Framer GCR00 Bit 7.
—
4
Preliminary Information
—
4
upl3txclksel[1]
3
—
3
upl3txclksel[0]
—
2
2
Figure
4-1).
OneSecMode
—
1
1
CX29503 Data Sheet
29503-DSH-002-B
—
0
—
0