cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 122

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cx29503

Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
Loopbacks
5.3
5-4
SI-Bus System Side Loopback
The transmitter is looped back to the receiver via the Loopback control and is
provided for diagnostic purposes, as shown in
controls the RxStart and TxStart signals so that the Receiver is synchronized with the
Transmitter. The Transmitter SI-Bus data and parity can then be directly looped to the
Receiver SI-Bus data and parity. The clocks required for this function are the 51.84
and 19.44 MHz SI-Bus Transmit clocks. This loopback is activated by setting the
TxRxLoopBk bit in the SI-Bus Transmit to Receive Loopback Control register
[SONET/SDH General Control/Status Block, addr: 0x6007,
Figure 5-3. SI-Bus System Side Loopback
Mindspeed Technologies™
TX DATA
Preliminary Information
SI-BUS
CX29503, One Slice
Figure
5-3. When enabled, this block
page
8-170].
CX29503 Data Sheet
29503-DSH-002-B
100702_055

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