cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 260

• Manufacturer Part Number: cx29503
• Description: Cx29503 Broadband Access Multiplexer Data Sheet
• Manufacturer: Mindspeed Technologies

Register Description
0x5243—Alarm Start Interrupt Status Register
The Alarm Start Interrupt Status register provides indications for the starting of continuous events. The event bit
is cleared when the register is read. In addition, the event bit is cleared upon setting the channel’s enable bit for
that event to prevent an immediate interrupt due to an old event.
Value after reset:
Direction:
Value after enable:
SEFStrt
LOSStrt
IdleStrt
YelStrt
AISStrt
OOFStrt
8-130
Reserved
7
Reserved
00(h)
Read only
00(h)
Severely Errored Frame (SEF) Event Start—Set when the receiver detects an SEF condition.
This bit is cleared when this register is read. This bit is low in E3 modes because there is no
defined SEF alarm in these modes.
LOS Event Start—Set when the signal received prior to B3ZS/HDB3 decoding is detected as
lost by the receiver. This bit is cleared when this register is read.
Idle Event Start—Set when the receiver detects the start of an Idle event in DS3 mode. This bit
is cleared when this register is read. This bit will be low in E3 modes because there is no
defined E3 idle signal.
Yellow Alarm Start—Set when the receiver detects the start of an RAI/RDI alarm. This bit is
cleared when this register is read.
AIS Alarm Start—Set when the receiver detects the start of an AIS alarm. This bit is cleared
when this register is read.
OOF Event Start—Set when the channel gets into an OOF condition. This bit is cleared when
this register is read.
6
SEFStrt
5
Mindspeed Technologies™
LOSStrt
Preliminary Information
4
IdleStrt
3
YelStrt
2
AISStrt
1
CX29503 Data Sheet
29503-DSH-002-B
OOFStrt
0