cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 133

• Manufacturer Part Number: cx29503
• Description: Cx29503 Broadband Access Multiplexer Data Sheet
• Manufacturer: Mindspeed Technologies

CX29503 Data Sheet
0x0003—Top Level Interrupt Enable Register (TOP_IRQ_ENB)
Writing a one to a TOP_IRQ_ENB bit enables the INTR_N pin to be asserted upon the occurrence of an
interrupt. The bit does not affect the reporting of interrupts to the CSP. See
OneSec
RXMAP
TXMAP
DS1E1
M13E13
DS3/E3
TSBus
CSP
Reset State
0x0004—DS1/E1 Framer Interrupt Request Register 1 (FR_IRR1)
The request bits are latched whether the corresponding enable bit is set or not. The processor must read the
appropriate Interrupt Status Register (ISR) in the DS1/E1 Framer module to clear the FR_IRR1 bit.
FR0
FR1
FR2
FR3
FR4
FR5
FR6
FR7
Reset State
29503-DSH-002-B
CSP
FR7
7
7
One-Second timer interrupt enable (1 = enable)
Receive the STS/SDH Mapper block interrupt enable (1 = enable)
Transmit the STS/SDH Mapper block interrupt enable (1 = enable)
DS1/E1 Frame1 block interrupt enable (1 = enable)
M13/E13 Framer block interrupt enable (1 = enable)
DS3/E3 Framer block interrupt enable (1 = enable)
Time Slot Bus interface block interrupt enable (1 = enable)
Command and Status Processor State Machine interrupt enable (1 = enable)
00000000
Interrupt from DS1/E1 Framer 0
Interrupt from DS1/E1 Framer 1
Interrupt from DS1/E1 Framer 2
Interrupt from DS1/E1 Framer 3
Interrupt from DS1/E1 Framer 4
Interrupt from DS1/E1 Framer 5
Interrupt from DS1/E1 Framer 6
Interrupt from DS1/E1 Framer 7
00000000
TSBus
FR6
6
6
DS3E3
FR5
5
5
Mindspeed Technologies™
M13E3
Preliminary Information
FR4
4
4
DS1E1
FR3
3
3
TXMAP
FR2
Figure
2
2
3-1for more details.
RXMAP
FR1
1
1
Register Description
OneSec
FR0
0
0
8
-
3