cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 266

• Manufacturer Part Number: cx29503
• Description: Cx29503 Broadband Access Multiplexer Data Sheet
• Manufacturer: Mindspeed Technologies

Register Description
0x5251—Receive FEAC Interrupt Status Register (SR17i)
An ISR bit is latched active (high) whenever its corresponding interrupt source reports an interrupt event. If the
corresponding interrupt enable is active (high), each interrupt event forces the RxFEACltrs bit in the IRR
[addr: 241] to active (high) and an interrupt event is reported in real-time to the Global Control and Status
block.
If the associated interrupt enable is inactive (low), the interrupt event is not reported to the Global Control and
Status block and the RxFEACltrs bit is not set in the IRR.
Value after reset:
Direction:
Value after enable:
RxFEACSNE
RxFEACIdle
RxFEACItr
8-136
Reserved
7
Reserved
00 (h)
Read only
00 (h)
Receive FEAC Stack is Not Empty. Set due to detection of the FEAC stack being “not empty,”
i.e., the Receive FEAC stack byte is holding valid data. The associated interrupt is enabled in
the Feature 3 Control register [addr: 231].
Received FEAC Channel is Idle—In DS3-C Bit Parity mode, set this bit when the FEAC
receiver detects the first appearance of an Idle code after the reception of legal code words.
In DS3-M13/M23 and both E3 modes, this bit should be ignored. The associated interrupt is
enabled in the Feature 3 Control register [addr: 231]. Cleared when this register is read.
Receive FEAC Channel Interrupt—In DS3-C Bit Parity mode, when working in FEAC single
mode, set this bit high when an FEAC message byte has been received and placed in the
Receive FEAC Channel Byte register. When working in FEAC repetitive mode, set this bit
high when a FEAC message byte is detected by the receiver. Reading the Receive FEAC
Channel Byte register clears this interrupt. In DS3-M13/M23 and E3-G.751 modes, this bit
should be ignored. The associated interrupt is enabled in the Feature 3 Control register
[addr: 231].
6
Reserved
5
Mindspeed Technologies™
Reserved
Preliminary Information
4
Reserved
3
RxFEACSNE
2
RxFEACIdle
1
CX29503 Data Sheet
29503-DSH-002-B
RxFEACltr
0