LPC1113FHN33/303,5 NXP Semiconductors, LPC1113FHN33/303,5 Datasheet - Page 157

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LPC1113FHN33/303,5

Manufacturer Part Number
LPC1113FHN33/303,5
Description
ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1113FHN33/303,5

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1113
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
24 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
NXP Semiconductors
Table 163. LPC11D14 pin description table (LQFP100 package)
UM10398
User manual
Symbol
R/PIO1_2/
AD3/CT32B1_MAT1
SWDIO/PIO1_3/
AD4/CT32B1_MAT2
PIO1_4/AD5/
CT32B1_MAT3/
WAKEUP
PIO1_5/RTS/
CT32B0_CAP0
PIO1_6/RXD/
CT32B0_MAT0
PIO1_7/TXD/
CT32B0_MAT1
PIO1_8/
CT16B1_CAP0
PIO1_9/
CT16B1_MAT0
PIO1_10/AD6/
CT16B1_MAT1
PIO1_11/AD7
PIO2_0 to PIO2_11
Pin
89
93
94
99
100
1
12
20
84
96
[3]
[5]
[5]
[5]
[3]
[3]
[3]
[5]
[5]
[3]
Start
logic
input
no
no
no
no
no
no
no
no
no
no
Chapter 9: LPC111x/LPC11Cxx Pin configuration (LPC1100, LPC1100C,
Type
I
I/O
I
O
I/O
I/O
I
O
I/O
I
O
I
I/O
O
I
I/O
I
O
I/O
O
O
I/O
I
I/O
O
I/O
I
O
I/O
I
I/O
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
Reset
state
[1]
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
I; PU
-
-
I; PU
-
-
I; PU
-
I; PU
-
I; PU
-
-
I; PU
-
Description
R — Reserved. Configure for an alternate function in the
IOCONFIG block.
PIO1_2 — General purpose digital input/output pin.
AD3 — A/D converter, input 3.
CT32B1_MAT1 — Match output 1 for 32-bit timer 1.
SWDIO — Serial wire debug input/output.
PIO1_3 — General purpose digital input/output pin.
AD4 — A/D converter, input 4.
CT32B1_MAT2 — Match output 2 for 32-bit timer 1.
PIO1_4 — General purpose digital input/output pin with 10 ns
glitch filter.
AD5 — A/D converter, input 5.
CT32B1_MAT3 — Match output 3 for 32-bit timer 1.
WAKEUP — Deep power-down mode wake-up pin with 20 ns
glitch filter. This pin must be pulled HIGH externally to enter
Deep power-down mode and pulled LOW to exit Deep
power-down mode. A LOW-going pulse as short as 50 ns
wakes up the part.
PIO1_5 — General purpose digital input/output pin.
RTS — Request To Send output for UART.
CT32B0_CAP0 — Capture input 0 for 32-bit timer 0.
PIO1_6 — General purpose digital input/output pin.
RXD — Receiver input for UART.
CT32B0_MAT0 — Match output 0 for 32-bit timer 0.
PIO1_7 — General purpose digital input/output pin.
TXD — Transmitter output for UART.
CT32B0_MAT1 — Match output 1 for 32-bit timer 0.
PIO1_8 — General purpose digital input/output pin.
CT16B1_CAP0 — Capture input 0 for 16-bit timer 1.
PIO1_9 — General purpose digital input/output pin.
CT16B1_MAT0 — Match output 0 for 16-bit timer 1.
PIO1_10 — General purpose digital input/output pin.
AD6 — A/D converter, input 6.
CT16B1_MAT1 — Match output 1 for 16-bit timer 1.
PIO1_11 — General purpose digital input/output pin.
AD7 — A/D converter, input 7.
Port 2 — Port 2 is a 12-bit I/O port with individual direction and
function controls for each bit. The operation of port 2 pins
depends on the function selected through the IOCONFIG
register block.
…continued
UM10398
© NXP B.V. 2012. All rights reserved.
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