LPC1113FHN33/303,5 NXP Semiconductors, LPC1113FHN33/303,5 Datasheet - Page 284

• Manufacturer Part Number: LPC1113FHN33/303,5
• Description: ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1113FHN33/303,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1113
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 24 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
16.6.1.5 CAN interrupt register
16.6.1.6 CAN test register
Table 249. CAN interrupt register (CANINT, address 0x4005 0010) bit description
If several interrupts are pending, the CAN Interrupt Register will point to the pending
interrupt with the highest priority, disregarding their chronological order. An interrupt
remains pending until the CPU has cleared it. If INTID is different from 0x0000 and IE is
set, the interrupt line to the CPU is active. The interrupt line remains active until INTID is
back to value 0x0000 (the cause of the interrupt is reset) or until IE is reset.
The Status Interrupt has the highest priority. Among the message interrupts, the Message
Object’ s interrupt priority decreases with increasing message number.
A message interrupt is cleared by clearing the Message Object’s INTPND bit. The
StatusInterrupt is cleared by reading the Status Register.
Write access to the Test Register is enabled by setting bit Test in the CAN Control
Register.
The different test functions may be combined, but when TX[1:0]  “00” is selected, the
message transfer is disturbed.
Table 250. CAN test register (CANTEST, address 0x4005 0014) bit description
Bit
15:0
31:16
Bit
1:0
2
3
4
Symbol
-
BASIC
SILENT
LBACK
Symbol
INTID
-
All information provided in this document is subject to legal disclaimers.
Value
-
0
1
0
1
0
1
Description
0x0000 = No interrupt is pending.
0x0001 - 0x0020 = Number of message object which
caused the interrupt.
0x0021 - 0x7FFF = Unused
0x8000 = Status interrupt
0x8001 - 0xFFFF = Unused
Reserved
Rev. 12 — 24 September 2012
Description
Reserved
Basic mode
Basic mode disabled.
IF1 registers used as TX buffer, IF2 registers
used as RX buffer.
Silent mode
Normal operation.
The module is in silent mode.
Loop back mode
Loop back mode is disabled.
Loop back mode is enabled.
Chapter 16: LPC111x/LPC11Cxx C_CAN controller
Reset
value
0
0
0
Reset
value
0
-
UM10398
© NXP B.V. 2012. All rights reserved.
Access
R
-
Access
-
R/W
R/W
R/W
284 of 538