LPC1113FHN33/303,5 NXP Semiconductors, LPC1113FHN33/303,5 Datasheet - Page 66

• Manufacturer Part Number: LPC1113FHN33/303,5
• Description: ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1113FHN33/303,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1113
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 24 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

7.1 How to read this chapter
7.2 Features
UM10398
User manual
Remark: This chapter applies to parts in the following series (see
Pin configuration
The implementation of the I/O configuration registers varies for different
LPC111x/LPC11Cxx parts and packages.
used on the different packages.
C_CAN pins
Pseudo open-drain function
For the LPC11(D)1x/102/202/302, a pseudo open-drain mode can be selected in the
IOCON registers for each digital pin except the I2C pins (see
mode is not available for the LPC111x/101/201/301 parts.
Pull-up level
If the pull-up resistor is enabled (default), all non-I2C pins are pulled up to 2.6 V for
LPC111x/101/201/301 parts and pulled up to 3.3 V for LPC11Cxx parts and
LPC111x/102/202/302 (V
The I/O configuration registers control the electrical characteristics of the pads. The
following features are programmable:
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UM10398
Chapter 7: LPC1100/LPC1100C/LPC1100L series: I/O
configuration (IOCONFIG)
Rev. 12 — 24 September 2012
LPC1100
LPC1100L
LPC1100C
LPC11D14
For the LPC11C12/C14, functions PIO3_4 and PIO3_5 are not available. Instead, two
pins are dedicated to the C_CAN receive and transmit functions (see
without pull-up or pull-down resistors. The C_CAN pins have no programmable pin
configuration.
For the LPC11C22/C24, pins PIO1_9, PIO2_4, PIO2_5, and PIO2_9 are not available
and are replaced by the on-chip CAN transceiver pins. The CAN transceiver pins
have no programmable pin configuration.
Pin function.
Internal pull-up/pull-down resistor or bus keeper function.
Hysteresis.
Analog input or digital mode for pads hosting the ADC inputs.
I
2
C mode for pads hosting the I
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
DD
= 3.3 V).
2
C-bus function.
Table 56
shows which IOCON registers are
Figure
Table
14). The open-drain
© NXP B.V. 2012. All rights reserved.
1):
Table
User manual
56)
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