LPC1113FHN33/303,5 NXP Semiconductors, LPC1113FHN33/303,5 Datasheet - Page 414

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LPC1113FHN33/303,5

Manufacturer Part Number
LPC1113FHN33/303,5
Description
ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1113FHN33/303,5

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1113
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
24 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
NXP Semiconductors
UM10398
User manual
26.3.8.1 ISP entry protection
Table 372. Code Read Protection hardware/software interaction
Table 373. ISP commands allowed for different CRP levels
In case a CRP mode is enabled and access to the chip is allowed via the ISP, an
unsupported or restricted ISP command will be terminated with return code
CODE_READ_PROTECTION_ENABLED.
In addition to the three CRP modes, the user can prevent the sampling of pin PIO0_1 for
entering ISP mode and thereby release pin PIO0_1 for other uses. This is called the
NO_ISP mode. The NO_ISP mode can be entered by programming the pattern
0x4E69 7370 at location 0x0000 02FC.
CRP option
CRP2
CRP3
CRP1
CRP2
CRP3
ISP command
Unlock
Set Baud Rate
Echo
Write to RAM
Read Memory
Prepare sector(s) for
write operation
Copy RAM to flash
Go
Erase sector(s)
Blank check sector(s)
Read Part ID
Read Boot code version yes
Compare
ReadUID
User Code
Valid
Yes
Yes
No
No
No
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
Chapter 26: LPC111x/LPC11Cxx Flash programming firmware
CRP1
yes
yes
yes
yes; above 0x1000 0300
only
no
yes
yes; not to sector 0
no
yes; sector 0 can only be
erased when all sectors are
erased.
no
yes
no
yes
PIO0_1 pin at
reset
Low
x
x
x
x
SWD enabled LPC111x/
No
No
No
No
No
CRP2
yes
yes
yes
no
no
yes
no
no
yes; all sectors
only
no
yes
yes
no
yes
LPC11Cxx
enters ISP
mode
Yes
No
Yes
Yes
Yes
CRP3 (no entry in ISP
mode allowed)
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
UM10398
© NXP B.V. 2012. All rights reserved.
partial flash
update in ISP
mode
No
NA
Yes
No
No
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