LPC1113FHN33/303,5 NXP Semiconductors, LPC1113FHN33/303,5 Datasheet - Page 245

• Manufacturer Part Number: LPC1113FHN33/303,5
• Description: ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1113FHN33/303,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1113
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 24 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
15.9 I
UM10398
User manual
2
C implementation and operation
15.8.4 Slave Transmitter mode
The first byte is received and handled as in the slave receiver mode. However, in this
mode, the direction bit will be 1, indicating a read operation. Serial data is transmitted via
SDA while the serial clock is input through SCL. START and STOP conditions are
recognized as the beginning and end of a serial transfer. In a given application, I
operate as a master and as a slave. In the slave mode, the I
slave address and the General Call address. If one of these addresses is detected, an
interrupt is requested. When the microcontrollers wishes to become the bus master, the
hardware waits until the bus is free before the master mode is entered so that a possible
slave action is not interrupted. If bus arbitration is lost in the master mode, the I
interface switches to the slave mode immediately and can detect its own slave address in
the same serial transfer.
Figure 50
describes the individual blocks.
Fig 48. Format of Slave Receiver mode
Fig 49. Format of Slave Transmitter mode
S
from Master to Slave
from Slave to Master
S
from Master to Slave
from Slave to Master
SLAVE ADDRESS
SLAVE ADDRESS
shows how the on-chip I
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Rev. 12 — 24 September 2012
RW=1
RW=0
2
Chapter 15: LPC111x/LPC11Cxx I2C-bus controller
C-bus interface is implemented, and the following text
A
A
DATA
DATA
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
S = START condition
P = STOP condition
Sr = Repeated START condition
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
S = START condition
P = STOP condition
n bytes data transmitted
n bytes data received
A
A
2
C hardware looks for its own
DATA
DATA
UM10398
© NXP B.V. 2012. All rights reserved.
A/A
A
2
C
2
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C may
P/Sr
P