LPC1113FHN33/303,5 NXP Semiconductors, LPC1113FHN33/303,5 Datasheet - Page 453

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LPC1113FHN33/303,5

Manufacturer Part Number
LPC1113FHN33/303,5
Description
ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1113FHN33/303,5

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1113
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
24 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
NXP Semiconductors
UM10398
User manual
28.4.2.1 Memory regions, types and attributes
The processor reserves regions of the Private peripheral bus (PPB) address range for
core peripheral registers, see
The memory map is split into regions. Each region has a defined memory type, and some
regions have additional memory attributes. The memory type and attributes determine the
behavior of accesses to the region.
The memory types are:
Normal — The processor can re-order transactions for efficiency, or perform speculative
reads.
Device — The processor preserves transaction order relative to other transactions to
Device or Strongly-ordered memory.
Fig 97. Generic ARM Cortex-M0 memory map
See
code locations are different on the LPC111x/LPC11Cxx.
Figure 6
Chapter 28: LPC111x/LPC11Cxx Appendix: ARM Cortex-M0 reference
All information provided in this document is subject to legal disclaimers.
for the LPC111x/LPC11Cxx specific implementation of the memory map. SRAM and
Rev. 12 — 24 September 2012
Section
28–28.3.
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UM10398
© NXP B.V. 2012. All rights reserved.
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