LPC1113FHN33/303,5 NXP Semiconductors, LPC1113FHN33/303,5 Datasheet - Page 25

• Manufacturer Part Number: LPC1113FHN33/303,5
• Description: ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1113FHN33/303,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1113
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 24 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
3.5.5 System oscillator control register
3.5.6 Watchdog oscillator control register
Table 11.
This register configures the frequency range for the system oscillator.
Table 12.
This register configures the watchdog oscillator. The oscillator consists of an analog and a
digital part. The analog part contains the oscillator function and generates an analog clock
(Fclkana). With the digital part, the analog output clock (Fclkana) can be divided to the
required output clock frequency wdt_osc_clk. The analog output frequency (Fclkana) can
be adjusted with the FREQSEL bits between 600 kHz and 4.6 MHz. With the digital part
Fclkana will be divided (divider ratios = 2, 4,...,64) to wdt_osc_clk using the DIVSEL bits.
The output clock frequency of the watchdog oscillator can be calculated as
wdt_osc_clk = Fclkana/(2  (1 + DIVSEL)) = 9.3 kHz to 2.3 MHz (nominal values).
Remark: Any setting of the FREQSEL bits will yield a Fclkana value within 40% of the
listed frequency value. The watchdog oscillator is the clock source with the lowest power
consumption. If accurate timing is required, use the IRC or system oscillator.
Remark: The frequency of the watchdog oscillator is undefined after reset. The watchdog
oscillator frequency must be programmed by writing to the WDTOSCCTRL register before
using the watchdog oscillator.
Bit
0
31:1
Bit
0
1
31:2
Symbol
LOCK
-
Symbol
BYPASS
FREQRANGE
-
System PLL status register (SYSPLLSTAT, address 0x4004 800C) bit description
System oscillator control register (SYSOSCCTRL, address 0x4004 8020) bit
description
All information provided in this document is subject to legal disclaimers.
Value
0
1
-
Rev. 12 — 24 September 2012
Chapter 3: LPC111x/LPC11Cxx System configuration (SYSCON)
PLL lock status
Description
PLL not locked
PLL locked
Reserved
Value
0
1
0
1
-
Description
Bypass system oscillator
Oscillator is not bypassed.
Bypass enabled. PLL input (sys_osc_clk) is fed
directly from the XTALIN pin bypassing the
oscillator. Use this mode when using an external
clock source instead of the crystal oscillator.
Determines frequency range for Low-power
oscillator.
1 - 20 MHz frequency range.
15 - 25 MHz frequency range
Reserved
UM10398
© NXP B.V. 2012. All rights reserved.
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Reset
value
0x0
0x00
Reset
value
0x0
0x0
0x00