LPC1113FHN33/303,5 NXP Semiconductors, LPC1113FHN33/303,5 Datasheet - Page 67

• Manufacturer Part Number: LPC1113FHN33/303,5
• Description: ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1113FHN33/303,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1113
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 24 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
7.3 General description
UM10398
User manual
Fig 14. Standard I/O pin configuration
as digital output
For open-drain mode, see
as analog input
as digital input
pin configured
pin configured
pin configured
7.3.1 Pin function
driver
The IOCON registers control the function (GPIO or peripheral function), the input mode,
and the hysteresis of all PIOn_m pins. In addition, the I
different I
can be selected.
The FUNC bits in the IOCON registers can be set to GPIO (FUNC = 000) or to a
peripheral function. If the pins are GPIO pins, the GPIOnDIR registers determine whether
the pin is configured as an input or output (see
function, the pin direction is controlled automatically depending on the pin’s functionality.
The GPIOnDIR registers have no effect for peripheral functions.
•
Pseudo open-drain mode for non-I2C pins (see
Section
2
open-drain enable
C-bus modes. If a pin is used as input pin for the ADC, an analog input mode
repeater mode
output enable
analog input
7.1.
data output
All information provided in this document is subject to legal disclaimers.
data input
enable
Chapter 7: LPC1100/LPC1100C/LPC1100L series: I/O configuration
Rev. 12 — 24 September 2012
pull-down enable
pull-up enable
select analog input
Section
V
V
DD
DD
Section 7.1
strong
pull-up
strong
pull-down
weak
pull-up
weak
pull-down
2
12.3.2). For any peripheral
C-bus pins can be configured for
for part specific details).
V
ESD
DD
ESD
V
SS
UM10398
© NXP B.V. 2012. All rights reserved.
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