LPC1113FHN33/303,5 NXP Semiconductors, LPC1113FHN33/303,5 Datasheet - Page 486

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LPC1113FHN33/303,5

Manufacturer Part Number
LPC1113FHN33/303,5
Description
ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1113FHN33/303,5

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1113
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
24 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
NXP Semiconductors
UM10398
User manual
28.5.5.7.3 Restrictions
28.5.5.7.4 Condition flags
28.5.5.7.5 Examples
28.5.5.8.1 Syntax
28.5.5.8.2 Operation
28.5.5.8.3 Restrictions
28.5.5.8.4 Condition flags
28.5.5.8 SXT and UXT
REVSH — converts 16-bit signed big-endian data into 32-bit signed little-endian data or
16-bit signed little-endian data into 32-bit signed big-endian data.
In these instructions, Rd, and Rn must only specify R0-R7.
These instructions do not change the flags.
Sign extend and Zero extend.
SXTB Rd, Rm
SXTH Rd, Rm
UXTB Rd, Rm
UXTH Rd, Rm
where:
These instructions extract bits from the resulting value:
In these instructions, Rd and Rm must only specify R0-R7.
These instructions do not affect the flags.
REV R3, R7 ; Reverse byte order of value in R7 and write it to R3
Rd is the destination register.
Rm is the register holding the value to be extended.
SXTB extracts bits[7:0] and sign extends to 32 bits
UXTB extracts bits[7:0] and zero extends to 32 bits
SXTH extracts bits[15:0] and sign extends to 32 bits
UXTH extracts bits[15:0] and zero extends to 32 bits.
REV16 R0, R0 ; Reverse byte order of each 16-bit halfword in R0
REVSH R0, R5 ; Reverse signed halfword
Chapter 28: LPC111x/LPC11Cxx Appendix: ARM Cortex-M0 reference
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
UM10398
© NXP B.V. 2012. All rights reserved.
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