LPC1113FHN33/303,5 NXP Semiconductors, LPC1113FHN33/303,5 Datasheet - Page 457

• Manufacturer Part Number: LPC1113FHN33/303,5
• Description: ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1113FHN33/303,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1113
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 24 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
28.4.3.2 Exception types
An interrupt request from a peripheral or from software can change the state of the
corresponding interrupt to pending.
Active — An exception that is being serviced by the processor but has not completed.
An exception handler can interrupt the execution of another exception handler. In this
case both exceptions are in the active state.
Active and pending — The exception is being serviced by the processor and there is a
pending exception from the same source.
The exception types are:
Remark: See
Reset — Reset is invoked on power up or a warm reset. The exception model treats reset
as a special form of exception. When reset is asserted, the operation of the processor
stops, potentially at any point in an instruction. When reset is deasserted, execution
restarts from the address provided by the reset entry in the vector table. Execution
restarts in Thread mode.
NMI — A NonMaskable Interrupt (NMI) can be signalled by a peripheral or triggered by
software. This is the highest priority exception other than reset. It is permanently enabled
and has a fixed priority of 2. NMIs cannot be:
HardFault — A HardFault is an exception that occurs because of an error during normal
or exception processing. HardFaults have a fixed priority of -1, meaning they have higher
priority than any exception with configurable priority.
SVCall — A supervisor call (SVC) is an exception that is triggered by the SVC instruction.
In an OS environment, applications can use SVC instructions to access OS kernel
functions and device drivers.
PendSV — PendSV is an interrupt-driven request for system-level service. In an OS
environment, use PendSV for context switching when no other exception is active.
SysTick — A SysTick exception is an exception the system timer generates when it
reaches zero. Software can also generate a SysTick exception. In an OS environment,
the processor can use this exception as system tick.
Interrupt (IRQ) — An interrupt, or IRQ, is an exception signalled by a peripheral, or
generated by a software request. All interrupts are asynchronous to instruction execution.
In the system, peripherals use interrupts to communicate with the processor.
Table 427. Properties of different exception types
Exception
number
1
2
3
4-10
11
•
•
masked or prevented from activation by any other exception
preempted by any exception other than Reset.
[1]
Section 28.1
Chapter 28: LPC111x/LPC11Cxx Appendix: ARM Cortex-M0 reference
All information provided in this document is subject to legal disclaimers.
IRQ
number
-
-14
-13
-
-5
Rev. 12 — 24 September 2012
[1]
for implementation of the NMI for specific parts.
Exception
type
Reset
NMI
HardFault
Reserved
SVCall
Priority
-3, the highest
-2
-1
-
Configurable
[3]
UM10398
© NXP B.V. 2012. All rights reserved.
-
Vector
address
0x00000004
0x00000008
0x0000000C
0x0000002C
[2]
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